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Message-ID: <c516ed73-5947-4b18-a1d9-18a9901e30e3@acm.org>
Date: Thu, 31 Jul 2025 09:52:44 -0700
From: Bart Van Assche <bvanassche@....org>
To: Nitin Rawat <quic_nitirawa@...cinc.com>, alim.akhtar@...sung.com,
avri.altman@....com, James.Bottomley@...senPartnership.com,
huobean@...il.com, mani@...nel.org, martin.petersen@...cle.com,
beanhuo@...ron.com, peter.wang@...iatek.com, andre.draszik@...aro.org
Cc: linux-arm-msm@...r.kernel.org, linux-scsi@...r.kernel.org,
linux-kernel@...r.kernel.org, Palash Kambar <quic_pkambar@...cinc.com>
Subject: Re: [PATCH V1] ufs: core: Fix interrupt handling for MCQ Mode in
ufshcd_intr
On 7/28/25 3:57 PM, Nitin Rawat wrote:
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index fd8015ed36a4..5413464d63c8 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -7145,14 +7145,19 @@ static irqreturn_t ufshcd_threaded_intr(int irq, void *__hba)
> static irqreturn_t ufshcd_intr(int irq, void *__hba)
> {
> struct ufs_hba *hba = __hba;
> + u32 intr_status, enabled_intr_status;
>
> /* Move interrupt handling to thread when MCQ & ESI are not enabled */
> if (!hba->mcq_enabled || !hba->mcq_esi_enabled)
> return IRQ_WAKE_THREAD;
>
> + intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
> + enabled_intr_status = intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
> +
> + ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
> +
> /* Directly handle interrupts since MCQ ESI handlers does the hard job */
> - return ufshcd_sl_intr(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS) &
> - ufshcd_readl(hba, REG_INTERRUPT_ENABLE));
> + return ufshcd_sl_intr(hba, enabled_intr_status);
> }
>
> static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
Reviewed-by: Bart Van Assche <bvanassche@....org>
Martin, this patch seems to be more popular than my "[PATCH v2] ufs:
core: Fix interrupt handling". Please consider queuing this patch when
this is convenient for you.
Thanks,
Bart.
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