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Message-ID: <d99c50ed-797b-4086-b1b5-d3df281d3c2a@rock-chips.com>
Date: Wed, 6 Aug 2025 11:32:47 +0800
From: Chaoyi Chen <chaoyi.chen@...k-chips.com>
To: Andrew Lunn <andrew@...n.ch>, Chaoyi Chen <kernel@...kyi.com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Maxime Coquelin <mcoquelin.stm32@...il.com>,
 Alexandre Torgue <alexandre.torgue@...s.st.com>,
 "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
 Jonas Karlman <jonas@...boo.se>, David Wu <david.wu@...k-chips.com>,
 netdev@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH] net: ethernet: stmmac: dwmac-rk: Make the clk_phy could
 be used for external phy

Hi Andrew,

On 8/6/2025 11:14 AM, Andrew Lunn wrote:
> On Wed, Aug 06, 2025 at 09:14:05AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@...k-chips.com>
>>
>> For external phy, clk_phy should be optional, and some external phy
>> need the clock input from clk_phy. This patch adds support for setting
>> clk_phy for external phy.
>>
>> Signed-off-by: David Wu <david.wu@...k-chips.com>
>> Signed-off-by: Chaoyi Chen <chaoyi.chen@...k-chips.com>
> Please take a read of:
>
> https://www.kernel.org/doc/html/latest/process/maintainer-netdev.html
>
> net-next is closed at the moment for the merge window.
>
> You also need the indicate the tree in the Subject: line.

Sorry for that, I will send v2 at an appropriate time.


>
>> ---
>>   drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 16 ++++++++++++----
>>   1 file changed, 12 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
>> index 700858ff6f7c..703b4b24f3bc 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
>> @@ -1558,6 +1558,7 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
>>   	struct device *dev = &bsp_priv->pdev->dev;
>>   	int phy_iface = bsp_priv->phy_iface;
>>   	int i, j, ret;
>> +	unsigned int rate;
> Reverse Christmas tree. Longest to shortest.

Will fix in v2.


>
>>   
>>   	bsp_priv->clk_enabled = false;
>>   
>> @@ -1595,12 +1596,19 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
>>   		clk_set_rate(bsp_priv->clk_mac, 50000000);
>>   	}
>>   
>> -	if (plat->phy_node && bsp_priv->integrated_phy) {
>> +	if (plat->phy_node) {
>>   		bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0);
>>   		ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy);
>> -		if (ret)
>> -			return dev_err_probe(dev, ret, "Cannot get PHY clock\n");
>> -		clk_set_rate(bsp_priv->clk_phy, 50000000);
>> +		/* If it is not integrated_phy, clk_phy is optional */
>> +		if (bsp_priv->integrated_phy) {
>> +			if (ret)
>> +				return dev_err_probe(dev, ret, "Cannot get PHY clock\n");
>> +
>> +			ret = of_property_read_u32(plat->phy_node, "clock-frequency", &rate);
> Is this property already in the DT binding?

I didn't see explicit binding, but make dtbs_check W=1 didn't generate 
any warning. I will drop this in v2.


>
>
>      Andrew
>
> ---
> pw-bot: cr
>
>

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