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Message-ID: <CA+V-a8sDcYkNKMrbWpO8ze9qpHmU=iqQyr-2J9Zh0tWO6VkbHg@mail.gmail.com>
Date: Wed, 6 Aug 2025 16:14:39 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Linus Walleij <linus.walleij@...aro.org>, linux-renesas-soc@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
John Madieu <john.madieu.xa@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 3/7] pinctrl: renesas: rzg2l: Unify OEN access by
making pin-to-bit mapping configurable
Hi Geert,
Thank you for the review.
On Wed, Aug 6, 2025 at 1:55 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, 9 Jul 2025 at 18:08, Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Refactor the RZG2L pinctrl driver to support reuse of the common
> > rzg2l_read_oen() and rzg2l_write_oen() helpers across SoCs with
> > different output-enable (OEN) bit mappings.
> >
> > Introduce a new `pin_to_oen_bit` callback in `struct rzg2l_pinctrl_data`
> > to allow SoCs to provide custom logic for mapping a pin to its OEN bit.
> > Update the generic OEN read/write paths to use this callback when present.
> >
> > With this change, SoCs like RZ/G3S can reuse the common OEN handling
> > code by simply supplying their own `pin_to_oen_bit` implementation.
> > The previously duplicated `rzg3s_oen_read()` and `rzg3s_oen_write()`
> > functions are now removed.
> >
> > This improves maintainability and prepares the driver for supporting
> > future SoCs with minimal duplication.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -296,6 +296,7 @@ struct rzg2l_pinctrl_data {
> > #endif
> > void (*pwpr_pfc_lock_unlock)(struct rzg2l_pinctrl *pctrl, bool lock);
> > void (*pmc_writeb)(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset);
> > + int (*pin_to_oen_bit)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
> > u32 (*oen_read)(struct rzg2l_pinctrl *pctrl, unsigned int _pin);
> > int (*oen_write)(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oen);
> > int (*hw_to_bias_param)(unsigned int val);
> > @@ -1070,7 +1071,9 @@ static u32 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin)
> > {
> > int bit;
> >
> > - bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> > + if (!pctrl->data->pin_to_oen_bit)
> > + return 0;
>
> Please add a blank line.
>
Ok, I will add a blank line here.
> > + bit = pctrl->data->pin_to_oen_bit(pctrl, _pin);
> > if (bit < 0)
> > return 0;
> >
> > @@ -1084,9 +1087,11 @@ static int rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, unsigned int _pin, u8 oe
> > int bit;
> > u8 val;
> >
> > - bit = rzg2l_pin_to_oen_bit(pctrl, _pin);
> > + if (!pctrl->data->pin_to_oen_bit)
> > + return -EINVAL;
>
> Likewise.
>
ditto.
Cheers,
Prabhakar
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