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Date: Wed, 06 Aug 2025 17:15:37 +0000
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Subject: Re: [PATCH v19 00/27] riscv control-flow integrity for usermode

Hello:

This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@...osinc.com>:

On Thu, 31 Jul 2025 16:19:10 -0700 you wrote:
> Basics and overview
> ===================
> 
> Software with larger attack surfaces (e.g. network facing apps like databases,
> browsers or apps relying on browser runtimes) suffer from memory corruption
> issues which can be utilized by attackers to bend control flow of the program
> to eventually gain control (by making their payload executable). Attackers are
> able to perform such attacks by leveraging call-sites which rely on indirect
> calls or return sites which rely on obtaining return address from stack memory.
> 
> [...]

Here is the summary with links:
  - [v19,01/27] mm: VM_SHADOW_STACK definition for riscv
    https://git.kernel.org/riscv/c/cbac1921f599
  - [v19,02/27] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml)
    https://git.kernel.org/riscv/c/529ea23b9724
  - [v19,03/27] riscv: zicfiss / zicfilp enumeration
    https://git.kernel.org/riscv/c/2672fcca7d45
  - [v19,04/27] riscv: zicfiss / zicfilp extension csr and bit definitions
    https://git.kernel.org/riscv/c/9c6a894fd8b3
  - [v19,05/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit
    https://git.kernel.org/riscv/c/b01f6537153c
  - [v19,06/27] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE
    https://git.kernel.org/riscv/c/c13b2d7c1365
  - [v19,07/27] riscv/mm: manufacture shadow stack pte
    https://git.kernel.org/riscv/c/68cd7334a8d2
  - [v19,08/27] riscv/mm: teach pte_mkwrite to manufacture shadow stack PTEs
    https://git.kernel.org/riscv/c/50c9b9607c89
  - [v19,09/27] riscv/mm: write protect and shadow stack
    https://git.kernel.org/riscv/c/cbcccac1eddc
  - [v19,10/27] riscv/mm: Implement map_shadow_stack() syscall
    https://git.kernel.org/riscv/c/26e35e774a64
  - [v19,11/27] riscv/shstk: If needed allocate a new shadow stack on clone
    https://git.kernel.org/riscv/c/9c72a71321a6
  - [v19,12/27] riscv: Implements arch agnostic shadow stack prctls
    https://git.kernel.org/riscv/c/52eff0ab5f8e
  - [v19,13/27] prctl: arch-agnostic prctl for indirect branch tracking
    https://git.kernel.org/riscv/c/157690650241
  - [v19,14/27] riscv: Implements arch agnostic indirect branch tracking prctls
    https://git.kernel.org/riscv/c/e97ca201e919
  - [v19,15/27] riscv/traps: Introduce software check exception and uprobe handling
    https://git.kernel.org/riscv/c/d88b76756b34
  - [v19,16/27] riscv: signal: abstract header saving for setup_sigcontext
    https://git.kernel.org/riscv/c/63e713f29efe
  - [v19,17/27] riscv/signal: save and restore of shadow stack for signal
    https://git.kernel.org/riscv/c/5b04bbd448a5
  - [v19,18/27] riscv/kernel: update __show_regs to print shadow stack register
    https://git.kernel.org/riscv/c/1400341403b3
  - [v19,19/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files
    https://git.kernel.org/riscv/c/982c862820b8
  - [v19,20/27] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe
    https://git.kernel.org/riscv/c/07b1d75233e4
  - [v19,21/27] riscv: kernel command line option to opt out of user cfi
    https://git.kernel.org/riscv/c/2c268d3d21f9
  - [v19,22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call
    https://git.kernel.org/riscv/c/4ff7e8937f22
  - [v19,23/27] arch/riscv: compile vdso with landing pad and shadow stack note
    https://git.kernel.org/riscv/c/a82422297e63
  - [v19,24/27] riscv: create a config for shadow stack and landing pad instr support
    https://git.kernel.org/riscv/c/5bb36633ee56
  - [v19,25/27] riscv: Documentation for landing pad / indirect branch tracking
    https://git.kernel.org/riscv/c/9868b87525d9
  - [v19,26/27] riscv: Documentation for shadow stack on riscv
    https://git.kernel.org/riscv/c/a56a53730eb6
  - [v19,27/27] kselftest/riscv: kselftest for user mode cfi
    https://git.kernel.org/riscv/c/fd40e4a14f45

You are awesome, thank you!
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