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Message-Id:
<175450053927.2863135.18156029900049802152.git-patchwork-notify@kernel.org>
Date: Wed, 06 Aug 2025 17:15:39 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Junhui Liu <junhui.liu@...moral.tech>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu, alex@...ti.fr,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] riscv: mm: Use mmu-type from FDT as SATP mode limit
Hello:
This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@...osinc.com>:
On Tue, 22 Jul 2025 00:53:09 +0800 you wrote:
> This patch series improves RISC-V kernel compatibility and robustness by
> refining how the SATP mode is determined during early boot. Some RISC-V
> implementations, such as the Anlogic DR1V90 FPSoC with a UX900 RISC-V
> core designed by Nuclei, which I am currently attempting to run the
> mainline kernel on [1], may hang when attempting to write an unsupported
> SATP mode.
>
> [...]
Here is the summary with links:
- [1/2] riscv: mm: Return intended SATP mode for noXlvl options
https://git.kernel.org/riscv/c/75ede0a8e07b
- [2/2] riscv: mm: Use mmu-type from FDT to limit SATP mode
https://git.kernel.org/riscv/c/a870d4f78f11
You are awesome, thank you!
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