linux-kernel - Re: [PATCH v5] selftests: riscv: add misaligned access testing

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Message-Id: 
 <175450055200.2863135.7169449906797738792.git-patchwork-notify@kernel.org>
Date: Wed, 06 Aug 2025 17:15:52 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Clément Léger <cleger@...osinc.com>@codeaurora.org
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
 linux-kselftest@...r.kernel.org, palmer@...belt.com,
 paul.walmsley@...ive.com, shuah@...nel.org, alex@...ti.fr, schwab@...e.de
Subject: Re: [PATCH v5] selftests: riscv: add misaligned access testing

Hello:

This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@...osinc.com>:

On Fri, 11 Jul 2025 13:19:24 +0000 you wrote:
> This selftest tests all the currently emulated instructions (except for
> the RV32 compressed ones which are left as a future exercise for a RV32
> user). For the FPU instructions, all the FPU registers are tested.
> 
> Signed-off-by: Clément Léger <cleger@...osinc.com>
> 
> 
> [...]

Here is the summary with links:
  - [v5] selftests: riscv: add misaligned access testing
    https://git.kernel.org/riscv/c/bf6594367a92

You are awesome, thank you!
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