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Message-ID: <20250811081543.4377-2-ot_shunxi.zhang@mediatek.com> Date: Mon, 11 Aug 2025 16:15:33 +0800 From: <ot_shunxi.zhang@...iatek.com> To: Eddie Huang <eddie.huang@...iatek.com>, Sean Wang <sean.wang@...iatek.com>, Alexandre Belloni <alexandre.belloni@...tlin.com>, Matthias Brugger <matthias.bgg@...il.com>, Lee Jones <lee@...nel.org>, Shunxi Zhang <ot_shunxi.zhang@...iatek.com> CC: <linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>, <linux-rtc@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <sirius.wang@...iatek.com>, <vince-wl.liu@...iatek.com>, <jh.hsu@...iatek.com> Subject: [PATCH v1 1/2] mfd: mt6397: Add new bit definitions for RTC_BBPU register From: Shunxi Zhang <ot_shunxi.zhang@...iatek.com> This patch adds new bit definitions for the RTC_BBPU register in the mt6397 RTC header file. The following bit definitions are introduced: Signed-off-by: Shunxi Zhang <ot_shunxi.zhang@...iatek.com> --- include/linux/mfd/mt6397/rtc.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index 27883af44f87..001cef6b7302 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -15,8 +15,11 @@ #include <linux/rtc.h> #define RTC_BBPU 0x0000 +#define RTC_BBPU_PWREN BIT(0) +#define RTC_BBPU_CLR BIT(1) +#define RTC_BBPU_RESET_AL BIT(3) #define RTC_BBPU_CBUSY BIT(6) -#define RTC_BBPU_KEY (0x43 << 8) +#define RTC_BBPU_KEY (0x43 << 8) #define RTC_WRTGR_MT6358 0x003a #define RTC_WRTGR_MT6397 0x003c -- 2.46.0
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