linux-kernel - Re: [PATCH 2/3] clk: qcom: dispcc-sc7280: Add dispcc resets

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <fh3uvnu3ydgdtez77ruuhlgq2obry4jifn5w3kok2qbjdkmtoz@j6jsealfbxzu>
Date: Tue, 12 Aug 2025 09:54:56 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Taniya Das <taniya.das@....qualcomm.com>
Cc: Bjorn Andersson <bjorn.andersson@....qualcomm.com>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	cros-qcom-dts-watchers@...omium.org, Konrad Dybcio <konradybcio@...nel.org>, 
	linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] clk: qcom: dispcc-sc7280: Add dispcc resets

On Tue, Aug 12, 2025 at 10:35:30AM +0530, Taniya Das wrote:
> 
> 
> On 8/12/2025 8:41 AM, Bjorn Andersson wrote:
> > Like many other platforms the sc7280 display clock controller provides
> > a couple of resets for the display subsystem. In particular the
> > MDSS_CORE_BCR is useful to reset the display subsystem to a known state
> > during boot, so add these.
> > 
> 
> In this issue I believe the requirement is to have a clean sheet and
> restart the MDSS explicitly. Historically MDSS never required a BCR reset.
> 

On most targets we rely on the display driver coming up and configuring
the hardware anew in a way that happens to be aligned with the existing
state (boot splash) - or there was no state, which makes this easier.

But I had to introduce the use of the BCR reset in compute platforms
when I worked on DP, because some of the state left by the bootloader
would conflict with what Linux was doing. Similar on this target, as
we're trying to initialize the display driver, we get a bunch of iommu
faults.

Ultimately, the display driver should likely read back the hardware
state and attempt a graceful transition between whatever state the
bootloader left the hardware in and what Linux wants it to be.

When this feature is implemented, the display driver can simply stop
pulling the BCR.

> > Signed-off-by: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
> > ---
> >  drivers/clk/qcom/dispcc-sc7280.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/drivers/clk/qcom/dispcc-sc7280.c b/drivers/clk/qcom/dispcc-sc7280.c
> > index 8bdf57734a3d47fdf8bd2053640d8ef462677556..465dc06c87128182348a4e0ea384af779647bd84 100644
> > --- a/drivers/clk/qcom/dispcc-sc7280.c
> > +++ b/drivers/clk/qcom/dispcc-sc7280.c
> > @@ -17,6 +17,7 @@
> >  #include "clk-regmap-divider.h"
> >  #include "common.h"
> >  #include "gdsc.h"
> > +#include "reset.h"
> >  
> >  enum {
> >  	P_BI_TCXO,
> > @@ -847,6 +848,11 @@ static struct gdsc *disp_cc_sc7280_gdscs[] = {
> >  	[DISP_CC_MDSS_CORE_GDSC] = &disp_cc_mdss_core_gdsc,
> >  };
> >  
> > +static const struct qcom_reset_map disp_cc_sc7280_resets[] = {
> > +	[DISP_CC_MDSS_CORE_BCR] = { 0x1000 },
> > +	[DISP_CC_MDSS_RSCC_BCR] = { 0x2000 },
> > +};
> > +
> >  static const struct regmap_config disp_cc_sc7280_regmap_config = {
> >  	.reg_bits = 32,
> >  	.reg_stride = 4,
> > @@ -861,6 +867,8 @@ static const struct qcom_cc_desc disp_cc_sc7280_desc = {
> >  	.num_clks = ARRAY_SIZE(disp_cc_sc7280_clocks),
> >  	.gdscs = disp_cc_sc7280_gdscs,
> >  	.num_gdscs = ARRAY_SIZE(disp_cc_sc7280_gdscs),
> > +	.resets = disp_cc_sc7280_resets,
> > +	.num_resets = ARRAY_SIZE(disp_cc_sc7280_resets),
> >  };
> >  
> >  static const struct of_device_id disp_cc_sc7280_match_table[] = {
> > 
> 
> Reviewed-by: Taniya Das <taniya.das@....qualcomm.com>
> 

Thanks,
Bjorn

> -- 
> Thanks,
> Taniya Das
>