linux-kernel - Re: [PATCH 4/4] dt-bindings: soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports

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Message-ID: <CAL_Jsq+1Aw5AyBeW+BhTuyWZ8BN8BJUq047oJCDKVQPZWxWYCA@mail.gmail.com>
Date: Tue, 12 Aug 2025 12:16:08 -0500
From: Rob Herring <robh@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>, Christophe Leroy <christophe.leroy@...roup.eu>
Cc: Qiang Zhao <qiang.zhao@....com>, Linus Walleij <linus.walleij@...aro.org>, 
	Bartosz Golaszewski <brgl@...ev.pl>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org, 
	linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org
Subject: Re: [PATCH 4/4] dt-bindings: soc: fsl: qe: Add an interrupt
 controller for QUICC Engine Ports

On Tue, Aug 12, 2025 at 10:23 AM Krzysztof Kozlowski <krzk@...nel.org> wrote:
>
> On 12/08/2025 13:02, Christophe Leroy wrote:
> > The QUICC Engine provides interrupts for a few I/O ports. This is
> > handled via a separate interrupt ID and managed via a triplet of
> > dedicated registers hosted by the SoC.
> >
> > Implement an interrupt driver for it for that those IRQs can then
> > be linked to the related GPIOs.
> >
> > Signed-off-by: Christophe Leroy <christophe.leroy@...roup.eu>
> > ---
> >  .../soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml       | 63 +++++++++++++++++++
> >  1 file changed, 63 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml
> > new file mode 100644
> > index 0000000000000..7c98706d03dd1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml
> > @@ -0,0 +1,63 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +
> > +title: Freescale QUICC Engine I/O Ports Interrupt Controller
> > +
> > +maintainers:
> > +  - name: Christophe Leroy
> > +    email: christophe.leroy@...roup.eu
>
> Oh no...
>
> > +
> > +description: |
> > +  Interrupt controller for the QUICC Engine I/O ports found on some
> > +  Freescale/NXP PowerQUICC and QorIQ SoCs.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - fsl,mpc8323-qe-ports-ic
> > +      - fsl,mpc8360-qe-ports-ic
> > +      - fsl,mpc8568-qe-ports-ic
> > +
> > +  reg:
> > +    description: Base address and size of the QE I/O Ports Interrupt Controller registers.
> > +    minItems: 1
> > +    maxItems: 1
>
> This was never tested but more important this and everything further
> looks like generated by AI. Please don't do that or at least mark it
> clearly, so I will prioritize accordingly (hint: AI generates poor code
> and burden to decipher AI slop should not be on open source reviewers
> but on users of AI, but as one of maintainers probably you already know
> that, so sorry for lecturing).

If anyone needs some AI (chatgpt) converted bindings, my "dt-convert"
branch has ~800 of them. Feeding the warnings back to AI to fix was
somewhat effective. The result is not the worst I've seen submitted.
It saves some of the boilerplate, but can't fix things that are just
wrong or unclear in .txt bindings. Despite my 'prompt engineering'
attempts, it still tends to get the same things wrong over and over.

Rob