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Message-ID: <20250812200344.3253781-4-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Tue, 12 Aug 2025 21:03:34 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH 03/13] arm64: dts: renesas: r9a09g077: Add pinctrl node
From: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Add pinctrl node to RZ/T2H ("R9A09G077") SoC DTSI.
Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
index 8ee88b8e8f33..0929ce2db05c 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
@@ -216,6 +216,19 @@ cpg: clock-controller@...80000 {
#power-domain-cells = <0>;
};
+ pinctrl: pinctrl@...c0000 {
+ compatible = "renesas,r9a09g077-pinctrl";
+ reg = <0 0x802c0000 0 0x10000>,
+ <0 0x812c0000 0 0x10000>,
+ <0 0x802b0000 0 0x10000>;
+ reg-names = "nsr", "srs", "srn";
+ clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 0 288>;
+ power-domains = <&cpg>;
+ };
+
gic: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
reg = <0x0 0x83000000 0 0x40000>,
--
2.50.1
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