linux-kernel - Re: [PATCH 3/4 FIXED] clk: thead: th1520-ap: set all AXI clocks to CLK_IS

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Message-ID: <aJrenvdlWd2mxzGB@x1>
Date: Mon, 11 Aug 2025 23:26:38 -0700
From: Drew Fustini <fustini@...nel.org>
To: Icenowy Zheng <uwu@...nowy.me>
Cc: Guo Ren <guoren@...nel.org>, Fu Wei <wefu@...hat.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Michal Wilczynski <m.wilczynski@...sung.com>,
	linux-riscv@...ts.infradead.org, linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/4 FIXED] clk: thead: th1520-ap: set all AXI clocks to
 CLK_IS_CRITICAL

On Tue, Aug 12, 2025 at 02:04:08PM +0800, Icenowy Zheng wrote:
> The AXI crossbar of TH1520 has no proper timeout handling, which means
> gating AXI clocks can easily lead to bus timeout and thus system hang.
> 
> Set all AXI clock gates to CLK_IS_CRITICAL. All these clock gates are
> ungated by default on system reset.
> 
> In addition, convert all current CLK_IGNORE_UNUSED usage to
> CLK_IS_CRITICAL to prevent unwanted clock gating.
> 
> Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
> ---
> This is for fixing my unfortunate rebasing error when tweaking the
> sequence of the patchset.
> 
> Please ignore the original 3/4, which created a build failure because of
> forgetting to remove extra definition of npu-axi and cpu2vp.

Thanks for fixing. I'll review the rest.

-Drew