linux-kernel - Re: [PATCH 4/4 FIXED] clk: thead: th1520-ap: fix parent of padctrl0 clock

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Message-ID: <6d21521067409c483a8d7af39e43a6d579c98dc4.camel@icenowy.me>
Date: Tue, 12 Aug 2025 17:17:45 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Drew Fustini <fustini@...nel.org>, Guo Ren <guoren@...nel.org>, Fu Wei
 <wefu@...hat.com>, Michael Turquette <mturquette@...libre.com>, Stephen
 Boyd <sboyd@...nel.org>, Michal Wilczynski <m.wilczynski@...sung.com>
Cc: linux-riscv@...ts.infradead.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4 FIXED] clk: thead: th1520-ap: fix parent of padctrl0
 clock

在 2025-08-12星期二的 14:04 +0800，Icenowy Zheng写道：
> The padctrl0 clock seems to be a child of the perisys_apb4_hclk
> clock,
> gating the later makes padctrl0 registers stuck.
> 
> Fix this relationship.
> 
> Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
> ---
> This is the consequence of fixing 3/4, because these two patches are
> at
> nearly the same position, and unfortunately get dependent by the
> algorithm of diff.
> 
> Ignore the original 4/4 and look at this too.
> 
>  drivers/clk/thead/clk-th1520-ap.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/thead/clk-th1520-ap.c
> b/drivers/clk/thead/clk-th1520-ap.c
> index 75ea1705cc08f..0ecedac50d6cb 100644
> --- a/drivers/clk/thead/clk-th1520-ap.c
> +++ b/drivers/clk/thead/clk-th1520-ap.c
> @@ -917,13 +917,18 @@ static CCU_GATE(CLK_PERISYS_APB3_HCLK,
> perisys_apb3_hclk, "perisys-apb3-hclk", p
>                 0x150, BIT(11), CLK_IS_CRITICAL);
>  static CCU_GATE(CLK_PERISYS_APB4_HCLK, perisys_apb4_hclk, "perisys-
> apb4-hclk", perisys_ahb_hclk_pd,
>                 0x150, BIT(12), 0);
> +
> +static const struct clk_parent_data perisys_apb4_hclk_pd[] = {
> +       { .hw = &perisys_apb4_hclk.common.hw },
> +};
> +
>  static CCU_GATE(CLK_NPU_AXI, npu_axi_clk, "npu-axi", axi_aclk_pd,
> 0x1c8, BIT(5), CLK_IS_CRITICAL);
>  static CCU_GATE(CLK_CPU2VP, cpu2vp_clk, "cpu2vp", axi_aclk_pd,
> 0x1e0, BIT(13), CLK_IS_CRITICAL);
>  static CCU_GATE(CLK_EMMC_SDIO, emmc_sdio_clk, "emmc-sdio",
> emmc_sdio_ref_clk_pd, 0x204, BIT(30), 0);
>  static CCU_GATE(CLK_GMAC1, gmac1_clk, "gmac1", gmac_pll_clk_pd,
> 0x204, BIT(26), 0);
>  static CCU_GATE(CLK_PADCTRL1, padctrl1_clk, "padctrl1",
> perisys_apb_pclk_pd, 0x204, BIT(24), 0);
>  static CCU_GATE(CLK_DSMART, dsmart_clk, "dsmart",
> perisys_apb_pclk_pd, 0x204, BIT(23), 0);
> -static CCU_GATE(CLK_PADCTRL0, padctrl0_clk, "padctrl0",
> perisys_apb_pclk_pd, 0x204, BIT(22), 0);
> +static CCU_GATE(CLK_PADCTRL0, padctrl0_clk, "padctrl0",
> perisys_apb4_hclk_pd, 0x204, BIT(22), 0);

Oops looks like this does not work and orphans the clock...

>  static CCU_GATE(CLK_GMAC_AXI, gmac_axi_clk, "gmac-axi",
> axi4_cpusys2_aclk_pd, 0x204, BIT(21), 0);
>  static CCU_GATE(CLK_GPIO3, gpio3_clk, "gpio3-clk",
> peri2sys_apb_pclk_pd, 0x204, BIT(20), 0);
>  static CCU_GATE(CLK_GMAC0, gmac0_clk, "gmac0", gmac_pll_clk_pd,
> 0x204, BIT(19), 0);