linux-kernel - Re: [PATCH v7 00/13] Enhance the PCIe controller driver for next generation controllers

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <cc4f69b3-4d9b-4a6f-a296-61ab5ffb9565@kernel.org>
Date: Wed, 13 Aug 2025 21:14:24 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: hans.zhang@...tech.com, bhelgaas@...gle.com, lpieralisi@...nel.org,
 kw@...ux.com, mani@...nel.org, robh@...nel.org, kwilczynski@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org
Cc: mpillai@...ence.com, fugang.duan@...tech.com, guoyin.chen@...tech.com,
 peter.chen@...tech.com, cix-kernel-upstream@...tech.com,
 linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 00/13] Enhance the PCIe controller driver for next
 generation controllers

On 13/08/2025 06:23, hans.zhang@...tech.com wrote:
> From: Hans Zhang <hans.zhang@...tech.com>
> 
> ---
> Dear Maintainers,
> 
> This series is Cadence's HPA PCIe IP and the Root Port driver of our
> CIX sky1. Please help review. Thank you very much.
> ---
> 
> Enhances the exiting Cadence PCIe controller drivers to support
> HPA (High Performance Architecture) Cadence PCIe controllers.
> 
> The patch set enhances the Cadence PCIe driver for HPA support.
> The header files are separated out for legacy and high performance
> register maps, register address and bit definitions. The driver
> read register and write register functions for HPA take the
> updated offset stored from the platform driver to access the registers.
> As part of refactoring of the code, few new files are added to the
> driver by splitting the existing files.
> This helps SoC vendor who change the address map within PCIe controller
> in their designs. Setting the menuconfig appropriately will allow
> selection between RP and/or EP PCIe controller support. The support
> will include Legacy and HPA for the selected configuration.
> 
> The TI SoC continues to be supported with the changes incorporated.
> 
> The changes address the review comments in the previous patches where
> the need to move away from "ops" pointers used in current implementation
> and separate out the Legacy and HPA driver implementation was stressed.
> 
> The scripts/checkpatch.pl has been run on the patches with and without
> --strict. With the --strict option, 4 checks are generated on 2 patch,
> which can be ignored. There are no code fixes required for these checks.
> All other checks generated by ./scripts/checkpatch.pl --strict can be 
> ignored.
> 
> ---
> Changes for v7
>         - Rebase to v6.17-rc1.
>         - Fixed the error issue of cix,sky1-pcie-host.yaml make dt_binding_check.
>         - CIX SKY1 Root Port driver compilation error issue: Add header
>           file, Kconfig select PCI_ECAM.
> 

Where are lore links to all previous versions?

Best regards,
Krzysztof