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Message-ID: <20250815130436.GA3289052@noisy.programming.kicks-ass.net>
Date: Fri, 15 Aug 2025 15:04:36 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Marc Zyngier <maz@...nel.org>, Oliver Upton <oliver.upton@...ux.dev>,
Tianrui Zhao <zhaotianrui@...ngson.cn>,
Bibo Mao <maobibo@...ngson.cn>, Huacai Chen <chenhuacai@...nel.org>,
Anup Patel <anup@...infault.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Xin Li <xin@...or.com>,
"H. Peter Anvin" <hpa@...or.com>, Andy Lutomirski <luto@...nel.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
kvm@...r.kernel.org, loongarch@...ts.linux.dev,
kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
Kan Liang <kan.liang@...ux.intel.com>,
Yongwei Ma <yongwei.ma@...el.com>,
Mingwei Zhang <mizhang@...gle.com>,
Xiong Zhang <xiong.y.zhang@...ux.intel.com>,
Sandipan Das <sandipan.das@....com>,
Dapeng Mi <dapeng1.mi@...ux.intel.com>
Subject: Re: [PATCH v5 09/44] perf/x86: Switch LVTPC to/from mediated PMI
vector on guest load/put context
On Wed, Aug 06, 2025 at 12:56:31PM -0700, Sean Christopherson wrote:
> @@ -2727,6 +2739,21 @@ static struct pmu pmu = {
> .filter = x86_pmu_filter,
> };
>
> +void arch_perf_load_guest_context(unsigned long data)
> +{
> + u32 masked = data & APIC_LVT_MASKED;
> +
> + apic_write(APIC_LVTPC,
> + APIC_DM_FIXED | PERF_GUEST_MEDIATED_PMI_VECTOR | masked);
> + this_cpu_write(x86_guest_ctx_loaded, true);
> +}
I'm further confused, why would this ever be masked?
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