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Message-ID:
<MAUPR01MB11072CB6BD1EC94B752AA1F8BFE34A@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM>
Date: Fri, 15 Aug 2025 11:56:22 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Zixian Zeng <sycamoremoon376@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Inochi Amaoto <inochiama@...il.com>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>
Cc: devicetree@...r.kernel.org, sophgo@...ts.linux.dev,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Han Gao <rabenda.cn@...il.com>
Subject: Re: [PATCH 4/4] riscv: dts: sophgo: Enable SPI NOR node for
SG2042_EVB_V2
On 8/13/2025 4:33 PM, Zixian Zeng wrote:
> Enable SPI NOR node for SG2042_EVB_V2 device tree
>
> Signed-off-by: Han Gao <rabenda.cn@...il.com>
> Signed-off-by: Zixian Zeng <sycamoremoon376@...il.com>
> ---
> arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
> index 46980e41b886ce17dacce791fa5f2cef14cfa214..7001d8ffdc3e04c5a5cd5da85a4fb1c0351eb9a5 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
> +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
> @@ -226,6 +226,18 @@ &sd {
> status = "okay";
> };
>
> +&spifmc1 {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <100000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
Only spifmc1 on EVB_V2? What about spifmc0?
Otherwise:
Reviewed-by: Chen Wang <unicorn_wang@...look.com>
> &uart0 {
> pinctrl-0 = <&uart0_cfg>;
> pinctrl-names = "default";
>
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