linux-kernel - RE: [PATCH v2 1/3] dt-bindings: lgm-dma: Added intel,dma-sw-desc property.

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Message-ID:
 <SA1PR19MB4909BA87E8CE98B5A6389349C234A@SA1PR19MB4909.namprd19.prod.outlook.com>
Date: Fri, 15 Aug 2025 10:06:13 +0000
From: Yi xin Zhu <yzhu@...linear.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, "vkoul@...nel.org"
	<vkoul@...nel.org>, "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>, "kees@...nel.org"
	<kees@...nel.org>, "dave.jiang@...el.com" <dave.jiang@...el.com>,
	"av2082000@...il.com" <av2082000@...il.com>, "dmaengine@...r.kernel.org"
	<dmaengine@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 1/3] dt-bindings: lgm-dma: Added intel,dma-sw-desc
 property.

Hi Krzysztof,
On 15/08/2025 16:32, Krzysztof wrote:
> 
> 
> And how is it not a OS policy? Bring reasoning and arguments, otherwise I
> cannot help you. Your reply above has zero hardware-related arguments, zero
> facts, zero hardware description.
> 
> Best regards,
> Krzysztof

Let me first describe the DMA hardware capability.  The DMA IP is designed with two control paths.
1. Hardware descriptor mode.  The DMA can be connected to another HW component that provides
Descriptors to DMA to automate DMA transfers.
2. Software descriptor mode.  The DMA IP also has interface to CPU via registers to allow CPU to
manage the DMA transfers.

Which mode DMA works in depends on SoC level configuration.  In the SoC, it could be some
of the DMA instances work in hardware descriptor mode while other DMA instances work in
software descriptor mode or all in HW/SW mode.

Can I take it as a hardware capability setting?
If I can't,  any other approach I can use to achieve the same target?

Best regards,
Yixin