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Message-ID: <0dc6c3b2-cf93-4cdf-b0bb-1b0d420f1060@wp.pl>
Date: Sat, 16 Aug 2025 14:04:09 +0200
From: Aleksander Jan Bajkowski <olek2@...pl>
To: Conor Dooley <conor@...nel.org>
Cc: tsbogend@...ha.franken.de, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
On 8/14/25 22:50, Conor Dooley wrote:
> On Thu, Aug 14, 2025 at 11:36:59AM +0200, Aleksander Jan Bajkowski wrote:
>> The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
>>
>> Signed-off-by: Aleksander Jan Bajkowski <olek2@...pl>
>> ---
>> .../mips/lantiq/lantiq,gptu-xway.yaml | 39 +++++++++++++++++++
>> 1 file changed, 39 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
>> new file mode 100644
>> index 000000000000..fcfc634dd391
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
>> @@ -0,0 +1,39 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
> "SoC series" implies that you're using the same compatible for multiple
> devices. Why are you not using device-specific compatibles?
This IP Core didn't change in subsequent generations of SoCs, so it had
one compatible string. In the next iteration, I will add device-specific
compatibles.
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