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Message-ID: <aKLaIxtuobcwOMb2@intel.com>
Date: Mon, 18 Aug 2025 15:45:39 +0800
From: Chao Gao <chao.gao@...el.com>
To: "Chang S. Bae" <chang.seok.bae@...el.com>
CC: <x86@...nel.org>, <tglx@...utronix.de>, <mingo@...hat.com>,
<bp@...en8.de>, <dave.hansen@...ux.intel.com>, <colinmitchell@...gle.com>,
<abusse@...zon.de>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/6] x86/microcode: Introduce staging step to reduce
late-loading time
>+ /*
>+ * Pre-load the microcode image into a staging device. This
>+ * process is preemptible and does not require stopping CPUs.
>+ * Successful staging simplifies the subsequent late-loading
>+ * process, reducing rendezvous time.
>+ *
>+ * Even if the transfer fails, the update will proceed as usual.
>+ */
>+ if (microcode_ops->use_staging)
>+ microcode_ops->stage_microcode();
->use_staging is not necessary. we can directly check if ->stage_microcode()
is NULL, or even add a stub function and then call ->stage_microcode()
unconditionally here. But since this pattern occurs only once in the series,
I don't have a strong preference.
If my review counts for anything,
Reviewed-by: Chao Gao <chao.gao@...el.com>
>+
> atomic_set(&late_cpus_in, num_online_cpus());
> atomic_set(&offline_in_nmi, 0);
> loops_per_usec = loops_per_jiffy / (TICK_NSEC / 1000);
>diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
>index 50a9702ae4e2..adf02ebbf7a3 100644
>--- a/arch/x86/kernel/cpu/microcode/internal.h
>+++ b/arch/x86/kernel/cpu/microcode/internal.h
>@@ -31,10 +31,12 @@ struct microcode_ops {
> * See also the "Synchronization" section in microcode_core.c.
> */
> enum ucode_state (*apply_microcode)(int cpu);
>+ void (*stage_microcode)(void);
> int (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
> void (*finalize_late_load)(int result);
> unsigned int nmi_safe : 1,
>- use_nmi : 1;
>+ use_nmi : 1,
>+ use_staging : 1;
> };
>
> struct early_load_data {
>--
>2.48.1
>
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