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Message-Id: <20250819135007.85646-1-cuiyunhui@bytedance.com>
Date: Tue, 19 Aug 2025 21:50:05 +0800
From: Yunhui Cui <cuiyunhui@...edance.com>
To: yury.norov@...il.com,
linux@...musvillemoes.dk,
paul.walmsley@...ive.com,
palmer@...belt.com,
aou@...s.berkeley.edu,
alex@...ti.fr,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
dennis@...nel.org,
tj@...nel.org,
cl@...two.org,
linux-mm@...ck.org
Cc: Yunhui Cui <cuiyunhui@...edance.com>
Subject: [PATCH 0/2] riscv: introduce percpu.h
Current per-CPU operations rely on generic code using raw_local_irq_save(),
which incurs significant overhead. This patch optimizes 32/64-bit paths with
RISC-V atomic instructions, reducing overhead.
RISC-V lacks lr/sc.b/h support; without ZABHA, emulating 8/16-bit operations
via lr/sc.w would require complex mask logic. However, data shows 8/16-bit
per-CPU operations are extremely rare (single-digit counts in boot and
hackbench tests). Thus, we let 8/16-bit ops fall back to the generic
implementation, avoiding unnecessary complexity. 32/64-bit ops use direct
atomic instructions for performance.
Yunhui Cui (2):
riscv: remove irqflags.h inclusion in asm/bitops.h
riscv: introduce percpu.h into include/asm
arch/riscv/include/asm/bitops.h | 1 -
arch/riscv/include/asm/percpu.h | 138 ++++++++++++++++++++++++++++++++
2 files changed, 138 insertions(+), 1 deletion(-)
create mode 100644 arch/riscv/include/asm/percpu.h
--
2.39.5
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