linux-kernel - Re: [PATCH 7/7] arm64: dts: renesas: r9a09g047e57-smarc: Enable GPT on carrier board

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Message-ID: <aKSlaQxFL4t9rZLh@tom-desktop>
Date: Tue, 19 Aug 2025 18:25:13 +0200
From: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
To: Biju <biju.das.au@...il.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
	Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Biju Das <biju.das.jz@...renesas.com>,
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 7/7] arm64: dts: renesas: r9a09g047e57-smarc: Enable GPT
 on carrier board

Hi Biju,

Thank you for your patch.

On Thu, Aug 14, 2025 at 07:41:11PM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@...renesas.com>
> 
> The GTIOC4{A,B} IOs are available on the carrier board's PMOD1_6A
> connector. Enable the GPT on the carrier board by adding the GPT pinmux
> and node on the carrier board dtsi file.
> 

Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>

> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> ---
>  arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> index 1e67f0a2a945..093c0202b4f9 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> @@ -84,6 +84,14 @@ &can_transceiver1 {
>  };
>  #endif
>  
> +#if (!SW_LCD_EN) && (!SW_GPIO8_CAN0_STB)
> +&gpt0 {
> +	pinctrl-0 = <&gpt0_pins>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +#endif
> +
>  &i2c0 {
>  	pinctrl-0 = <&i2c0_pins>;
>  	pinctrl-names = "default";
> @@ -125,6 +133,11 @@ can4_pins: can4 {
>  		};
>  	};
>  
> +	gpt0_pins: gpt0 {
> +		pinmux = <RZG3E_PORT_PINMUX(5, 4, 10)>, /* GTIOC4A */
> +			 <RZG3E_PORT_PINMUX(5, 5, 10)>; /* GTIOC4B */
> +	};
> +
>  	i2c0_pins: i2c0 {
>  		pinmux = <RZG3E_PORT_PINMUX(D, 4, 4)>, /* SCL0 */
>  			 <RZG3E_PORT_PINMUX(D, 5, 4)>; /* SDA0 */
> -- 
> 2.43.0
>

Thanks & Regards,
Tommaso