linux-kernel - RE: [PATCH v4 2/2] PCI: imx6: Enable the vaux regulator when fetch it

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Message-ID:
 <AS8PR04MB8833CEA0D45BD47C1FD7959C8C30A@AS8PR04MB8833.eurprd04.prod.outlook.com>
Date: Tue, 19 Aug 2025 09:01:17 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Manivannan Sadhasivam <mani@...nel.org>
CC: Frank Li <frank.li@....com>, "l.stach@...gutronix.de"
	<l.stach@...gutronix.de>, "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
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	<kernel@...gutronix.de>, "festevam@...il.com" <festevam@...il.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
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	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 2/2] PCI: imx6: Enable the vaux regulator when fetch it

> -----Original Message-----
> From: Manivannan Sadhasivam <mani@...nel.org>
> Sent: 2025年8月19日 16:52
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: Frank Li <frank.li@....com>; l.stach@...gutronix.de;
> lpieralisi@...nel.org; kwilczynski@...nel.org; robh@...nel.org;
> krzk+dt@...nel.org; conor+dt@...nel.org; bhelgaas@...gle.com;
> shawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> festevam@...il.com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> imx@...ts.linux.dev; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v4 2/2] PCI: imx6: Enable the vaux regulator when fetch
> it
> 
> On Tue, Aug 19, 2025 at 03:16:30PM GMT, Richard Zhu wrote:
> > Enable the vaux regulator at probe time and keep it enabled for the
> > entire PCIe controller lifecycle. This ensures support for outbound
> > wake-up mechanism such as WAKE# signaling.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 5a38cfaf989b1..1c1dce2d87e44 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -159,6 +159,7 @@ struct imx_pcie {
> >  	u32			tx_deemph_gen2_6db;
> >  	u32			tx_swing_full;
> >  	u32			tx_swing_low;
> > +	struct regulator	*vaux;
> >  	struct regulator	*vpcie;
> >  	struct regulator	*vph;
> >  	void __iomem		*phy_base;
> > @@ -1739,6 +1740,20 @@ static int imx_pcie_probe(struct
> platform_device *pdev)
> >  	pci->max_link_speed = 1;
> >  	of_property_read_u32(node, "fsl,max-link-speed",
> > &pci->max_link_speed);
> >
> > +	/*
> > +	 * Refer to PCIe CEM r6.0, sec 2.3 WAKE# Signal, WAKE# signal is only
> > +	 * asserted by the Add-in Card when all its functions are in D3Cold
> > +	 * state and at least one of its functions is enabled for wakeup
> > +	 * generation. The 3.3V auxiliary power (+3.3Vaux) must be present and
> > +	 * used for wakeup process. Since the main power supply would be
> gated
> > +	 * off to let Add-in Card to be in D3Cold, get the vaux and keep it
> > +	 * enabled to power up WAKE# circuit for the entire PCIe controller
> > +	 * lifecycle when WAKE# is supported.
> > +	 */
> 
> This comment implies that the presence of Vaux is dependent on WAKE#.
> But there is no such check present in the code. Maybe you are referring to
> the fact that the platform will only supply Vaux if it intends to support
> WAKE#?
Yes, it is. The Vaux power supply would be present if the WAKE# is supported
 by the board.
> 
> But I guess you can just drop the comment altogether and move it to patch
> description.
Okay.

Best Regards
Richard Zhu
> 
> - Mani
> 
> --
> மணிவண்ணன் சதாசிவம்