[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <6d664b4b-080f-442e-bb7e-4d220a16ccf4@bootlin.com>
Date: Tue, 19 Aug 2025 11:45:44 +0200
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: Michael Walle <mwalle@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>
Cc: Siddharth Vadapalli <s-vadapalli@...com>,
Matthias Schiffer <matthias.schiffer@...tq-group.com>,
Andrew Lunn <andrew@...n.ch>, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org, nm@...com,
vigneshr@...com
Subject: Re: [PATCH v3] phy: ti: gmii-sel: Always write the RGMII ID setting
On 19/08/2025 08:56, Michael Walle wrote:
> Some SoCs are just validated with the TX delay enabled. With commit
> ca13b249f291 ("net: ethernet: ti: am65-cpsw: fixup PHY mode for fixed
> RGMII TX delay"), the network driver will patch the delay setting on the
> fly assuming that the TX delay setting is fixed. In reality, the TX
> delay is configurable and just skipped in the documentation. There are
> bootloaders, which will disable the TX delay and this will lead to a
> transmit path which doesn't add any delays at all.
> Fix that by always writing the RGMII_ID setting and report an error for
> unsupported RGMII delay modes.
>
> This is safe to do and shouldn't break any boards in mainline because
> the fixed delay is only introduced for gmii-sel compatibles which are
> used together with the am65-cpsw-nuss driver and also contains the
> commit above.
>
> Fixes: ca13b249f291 ("net: ethernet: ti: am65-cpsw: fixup PHY mode for fixed RGMII TX delay")
> Signed-off-by: Michael Walle <mwalle@...nel.org>
Reviewed-by: Maxime Chevallier <maxime.chevallier@...tlin.com>
Maxime
Powered by blists - more mailing lists