Message-ID: <cover.1755599808.git.akhilesh@ee.iitb.ac.in>
Date: Tue, 19 Aug 2025 16:16:53 +0530
From: Akhilesh Patil <akhilesh@...iitb.ac.in>
To: alexandre.belloni@...tlin.com, mturquette@...libre.com,
	sboyd@...nel.org
Cc: linux-rtc@...r.kernel.org, linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org, akhileshpatilvnit@...il.com,
	skhan@...uxfoundation.org
Subject: [PATCH 0/1] rtc: ds1307: add support for clock provider in ds1307

Hi all, 

This work adds support for square-wave output from ds1307 rtc chip. 
ds1307 rtc supports generating 4 rates of square wave output signal,
1, 4096, 8192, 32768 Hz. This output can be controlled by device
register - CONTROL_REGISTER at I2C address 0x7 as follows: 
OUT [7] : control default state of SQW/OUT pin if clock output is disabled.
SQWE [4] : Enable/Disable output clock
RS [1:0] : Select the rate for output clock.

Other devices can use this clock via DT and Common Clock Framework.

I have done testing and validation using CCF's debugfs interface.
Below are the details of test/validation done for this patch.

*** Test setup

Hardware:
* I am using Texas Instruments AM62x SK board (ARM64 based SoC)
* ds1307 RTC hardware module.
* I have connected ds1307 module at I2C0 bus of am62x available
at 40pin user expansion connector headers.
SDA --> pin 27
SCL --> pin 28
No pull up needed as board already have pull ups on I2C0 lines.
* 24MHz logic analyzer to see the waveforms and validate frequency.

Kernel:
* v6.17-rc2
* define CLOCK_ALLOW_WRITE_DEBUGFS manually in drivers/clk/clk.c
so that we can use debugfs interface to test setting clock rates.
Note: This config is intentionally kept manual in the kernel and 
should be defined manually only.

*** Validation steps: 

Step 1: Probe the module
$ modprobe rtc-ds1307

Step 2: Mount debugfs
$ mount -t debugfs none /sys/kernel/debug

Step 3: Instantiate device
$ echo "ds1307 0x68" > /sys/class/i2c-dev/i2c-0/device/new_device

Step 4: read initial rate
$ cat /sys/kernel/debug/clk/ds1307_clk_sqw/clk_rate
1

Step 5: Set rate to 8192 and enable square-wave output
$ echo 8192 > /sys/kernel/debug/clk/ds1307_clk_sqw/clk_rate
$ echo 1 > /sys/kernel/debug/clk/ds1307_clk_sqw/clk_prepare_enable

Step 6: Verify rate
$ cat /sys/kernel/debug/clk/ds1307_clk_sqw/clk_rate
8192
Validate output clock using logic analyzer.
Probe at pin #7 (SQW/OUT) of ds1307 chip.

Step 7: delete the device
$ echo "0x68" > /sys/class/i2c-dev/i2c-0/device/delete_device

Step 8: use i2ctools to direct read device register 0x7
$ i2cget -y 0 0x68 0x7
0x12
0x12 shows that clock is enabled with frequency 8192Hz by our driver.

step 9: Redo Step 3 through 8 for various supported rates
I have put few important debug printk() on various callbacks
to validate codepaths. Below is testing log for various random rates. 

$ echo 81929999 > /sys/kernel/debug/clk/ds1307_clk
[  913.107859] ds1307 determine rate callback rate:
[  913.114978] DS1307 set rate callback
[  913.119598] ds1307 recalc rate callback rate: 1

$ echo 10 > /sys/kernel/debug/clk/ds1307_clk
[  976.439016] ds1307 determine rate callback rate:
[  976.446192] DS1307 set rate callback
[  976.450849] ds1307 recalc rate callback rate: 4096

$ echo 5000 > /sys/kernel/debug/clk/ds1307_clk
[  991.732748] ds1307 determine rate callback rate:
[  991.739954] DS1307 set rate callback
[  991.744576] ds1307 recalc rate callback rate: 8192

$ echo 9000 > /sys/kernel/debug/clk/ds1307_clk
[ 1007.463786] ds1307 determine rate callback rate:
[ 1007.471000] DS1307 set rate callback
[ 1007.475636] ds1307 recalc rate callback rate: 32768

$ echo 40000 > /sys/kernel/debug/clk/ds1307_clk
[ 1020.292701] ds1307 determine rate callback rate:
[ 1020.299934] DS1307 set rate callback
[ 1020.304563] ds1307 recalc rate callback rate: 1

Regards,
Akhilesh

Akhilesh Patil (1):
  rtc: ds1307: add support for clock provider in ds1307

 drivers/rtc/rtc-ds1307.c | 139 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 137 insertions(+), 2 deletions(-)

-- 
2.34.1

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