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Message-Id: <20250820-drm-tidss-field-api-v2-11-43cab671c648@kernel.org>
Date: Wed, 20 Aug 2025 16:01:51 +0200
From: Maxime Ripard <mripard@...nel.org>
To: Jyri Sarha <jyri.sarha@....fi>,
Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Maxime Ripard <mripard@...nel.org>
Subject: [PATCH v2 11/14] drm/tidss: dispc: Switch VP_REG_GET to using a
mask
The VP_REG_GET function takes the start and end bits as parameter and
will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VP_REG_GET to take the mask as an argument instead, and let
the caller create the mask. Eventually, this mask will be moved to a
define.
Signed-off-by: Maxime Ripard <mripard@...nel.org>
---
drivers/gpu/drm/tidss/tidss_dispc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 8c0949203ace147e403ea43ab468c3a56d170156..45422fb6038a255b8ba1246762f39a4284e5b1d5 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -632,13 +632,12 @@ void tidss_disable_oldi(struct tidss_device *tidss, u32 hw_videoport)
u32 _reg = dispc_vid_read(_dispc, _hw_plane, _idx); \
FIELD_MODIFY((mask), &_reg, (val)); \
dispc_vid_write(_dispc, _hw_plane, _idx, _reg); \
})
-#define VP_REG_GET(dispc, vp, idx, start, end) \
- ((u32)FIELD_GET(GENMASK((start), (end)), \
- dispc_vp_read((dispc), (vp), (idx))))
+#define VP_REG_GET(dispc, vp, idx, mask) \
+ ((u32)FIELD_GET((mask), dispc_vp_read((dispc), (vp), (idx))))
#define VP_REG_FLD_MOD(dispc, vp, idx, val, start, end) \
({ \
struct dispc_device *_dispc = (dispc); \
u32 _vp = (vp); \
@@ -1273,16 +1272,17 @@ void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)
}
}
bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)
{
- return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5);
+ return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL,
+ GENMASK(5, 5));
}
void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)
{
- WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5));
+ WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, GENMASK(5, 5)));
VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5);
}
enum c8_to_c12_mode { C8_TO_C12_REPLICATE, C8_TO_C12_MAX, C8_TO_C12_MIN };
--
2.50.1
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