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Message-ID: <157157b1-dc05-403a-bd1d-ec8d829dbd8d@amd.com>
Date: Wed, 20 Aug 2025 09:04:31 +0530
From: "Upadhyay, Neeraj" <neeraj.upadhyay@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: linux-kernel@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
dave.hansen@...ux.intel.com, Thomas.Lendacky@....com, nikunj@....com,
Santosh.Shukla@....com, Vasant.Hegde@....com, Suravee.Suthikulpanit@....com,
David.Kaplan@....com, x86@...nel.org, hpa@...or.com, peterz@...radead.org,
seanjc@...gle.com, pbonzini@...hat.com, kvm@...r.kernel.org,
kirill.shutemov@...ux.intel.com, huibo.wang@....com, naveen.rao@....com,
francescolavra.fl@...il.com, tiala@...rosoft.com
Subject: Re: [PATCH v9 04/18] x86/apic: Initialize APIC ID for Secure AVIC
On 8/20/2025 3:23 AM, Borislav Petkov wrote:
> On Mon, Aug 11, 2025 at 03:14:30PM +0530, Neeraj Upadhyay wrote:
>> Initialize the APIC ID in the Secure AVIC APIC backing page with
>> the APIC_ID msr value read from Hypervisor. CPU topology evaluation
>> later during boot would catch and report any duplicate APIC ID for
>> two CPUs.
>>
>> Reviewed-by: Tianyu Lan <tiala@...rosoft.com>
>> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
>> ---
>> Changes since v8:
>> - Added Tianyu's Reviewed-by.
>> - Code cleanup.
>>
>> arch/x86/kernel/apic/x2apic_savic.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
>> index 86a522685230..55edc6c30ba4 100644
>> --- a/arch/x86/kernel/apic/x2apic_savic.c
>> +++ b/arch/x86/kernel/apic/x2apic_savic.c
>> @@ -141,6 +141,12 @@ static void savic_setup(void)
>> enum es_result res;
>> unsigned long gpa;
>>
>> + /*
>> + * Before Secure AVIC is enabled, APIC msr reads are intercepted.
>
> s/msr/MSR/g
>
> Please check your whole text for such acronyms.
>
Ok, will fix this in all patches.
- Neeraj
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