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Message-ID: <60628e3d-0a59-453e-acb3-acfc6dfe62af@oss.qualcomm.com>
Date: Wed, 20 Aug 2025 14:24:33 +0800
From: yuanfang zhang <yuanfang.zhang@....qualcomm.com>
To: Rob Herring <robh@...nel.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
kernel@....qualcomm.com, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: arm: qcom: Add Coresight Interconnect
TNOC
On 8/20/2025 3:45 AM, Rob Herring wrote:
> On Tue, Aug 19, 2025 at 03:27:43AM -0700, Yuanfang Zhang wrote:
>> Add device tree binding for Qualcomm Coresight Interconnect Trace
>> Network On Chip (ITNOC). This TNOC acts as a CoreSight
>> graph link that forwards trace data from a subsystem to the
>> Aggregator TNOC, without aggregation or ATID functionality.
>>
>> Signed-off-by: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
>> ---
>> .../bindings/arm/qcom,coresight-itnoc.yaml | 96 ++++++++++++++++++++++
>> 1 file changed, 96 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..a3b5f2b949f69617a014d0ae2831c9c767178f8c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml
>> @@ -0,0 +1,96 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Interconnect Trace Network On Chip - ITNOC
>> +
>> +maintainers:
>> + - Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
>> +
>> +description:
>> + The Interconnect TNOC is a CoreSight graph link that forwards trace data
>> + from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it
>> + does not have aggregation and ATID functionality.
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^itnoc(@[0-9a-f]+)?$"
>> +
>> + compatible:
>> + const: qcom,coresight-itnoc
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + clock-names:
>> + items:
>> + - const: apb
>> +
>> + in-ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>
>> + properties:
>> + '#address-cells':
>> + const: 1
>> + '#size-cells':
>> + const: 0
>
> Drop these. Already defined by the above ref.
>
sure, will update.
>> +
>> + patternProperties:
>> + '^port(@[0-9a-f]{1,2})?$':
>> + description: Input connections from CoreSight Trace Bus
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> + out-ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> + additionalProperties: false
>> +
>> + properties:
>> + port:
>> + description: out connections to aggregator TNOC
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - in-ports
>> + - out-ports
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + itnoc@...ac000 {
>> + compatible = "qcom,coresight-itnoc";
>> + reg = <0x109ac000 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port@0 {
>> + reg = <0>;
>> + tn_ic_in_tpdm_dcc: endpoint {
>> + remote-endpoint = <&tpdm_dcc_out_tn_ic>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + tn_ic_out_tnoc_aggr: endpoint {
>> + /* to Aggregator TNOC input */
>> + remote-endpoint = <&tn_ag_in_tn_ic>;
>> + };
>> + };
>> + };
>> + };
>> +...
>>
>> --
>> 2.34.1
>>
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