lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <aKWcaPyal4mDfy3J@BLRRASHENOY1.amd.com>
Date: Wed, 20 Aug 2025 15:29:04 +0530
From: "Gautham R. Shenoy" <gautham.shenoy@....com>
To: K Prateek Nayak <kprateek.nayak@....com>
Cc: Borislav Petkov <bp@...en8.de>, Naveen N Rao <naveen@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Sean Christopherson <seanjc@...gle.com>,
	Paolo Bonzini <pbonzini@...hat.com>, x86@...nel.org,
	Sairaj Kodilkar <sarunkod@....com>,
	"H. Peter Anvin" <hpa@...or.com>,
	"Peter Zijlstra (Intel)" <peterz@...radead.org>,
	"Xin Li (Intel)" <xin@...or.com>,
	Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
	linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
	Mario Limonciello <mario.limonciello@....com>,
	Babu Moger <babu.moger@....com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: Re: [PATCH v3 0/4] x86/cpu/topology: Work around the nuances of
 virtualization on AMD/Hygon

On Wed, Aug 20, 2025 at 02:42:26PM +0530, K Prateek Nayak wrote:
> Hello Boris,
> 
> On 8/20/2025 2:29 PM, Borislav Petkov wrote:
> > On Wed, Aug 20, 2025 at 01:41:28PM +0530, Naveen N Rao wrote:
> >> That suggests use of leaf 0xb for the initial x2APIC ID especially 
> >> during early init.  I'm not sure why leaf 0x8000001e was preferred over 
> >> leaf 0xb in commit c749ce393b8f ("x86/cpu: Use common topology code for 
> >> AMD") though.
> > 
> > Well, I see parse_topology_amd() calling cpu_parse_topology_ext() if you have
> > TOPOEXT - which all AMD hw does - which then does cpu_parse_topology_ext() and
> > that one tries 0x80000026 and then falls back to 0xb and *only* *then* to
> > 0x8000001e.
> > 
> > So, it looks like it DTRT to me...
> 
> But parse_8000_001e() then unconditionally overwrites the
> "initial_apicid" with the value in 0x8000001E EAX despite it being
> populated from cpu_parse_topology_ext().
> 
> The flow is as follows:
> 
>   parse_topology_amd()
>     if (X86_FEATURE_TOPOEXT) /* True */
      ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>	cpu_parse_topology_ext();

Patch 2 from this patchset, which removes this "if" condition above
seems to be the right thing to do.

X86_FEATURE_TOPOEXT refers to CPUID 0x80000001.ECX[22] which advertises the support for 0x8000001D.EAX
and 0x8000001E.EAX.

OTOH, the function cpu_parse_topology_ext() parses the topology via the following CPUIDs in that order

* CPUID 0x1f (Intel Only)
* CPUID 0x80000026 (AMD only)
* CPUID 0xB (Both Intel and AMD)

None of these have anything to do with X86_FEATURE_TOPOEXT.

So the call to cpu_parse_topology_ext() in parse_topology_amd()
doesn't have to be gated by the presence or absence of
X86_FEATURE_TOPOEXT.

I agree that QEMU needs to sort out what needs to do something better
than clearing all the regs of CPUID 0x8000001E on encountering a
topology with more than 256 cores.

Or at the very least not clear the CPUID 0x8000001E.EAX which has the
provision to advertise a valid Extended APIC ID.

-- 
Thanks and Regards
gautham.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ