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Message-ID: <20250821163320.GE1270980@robin.jannau.net>
Date: Thu, 21 Aug 2025 18:33:20 +0200
From: Janne Grunau <j@...nau.net>
To: Sven Peter <sven@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Felipe Balbi <balbi@...nel.org>,
Alyssa Rosenzweig <alyssa@...enzweig.io>,
Neal Gompa <neal@...pa.dev>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Philipp Zabel <p.zabel@...gutronix.de>, linux-usb@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
asahi@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH RFC 03/22] dt-bindings: phy: Add Apple Type-C PHY
On Thu, Aug 21, 2025 at 03:38:55PM +0000, Sven Peter wrote:
> Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
> USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon
> SoCs.
>
> The PHY handles muxing between these different protocols and also provides
> the reset controller for the attached dwc3 USB controller.
>
> Signed-off-by: Sven Peter <sven@...nel.org>
> ---
> .../devicetree/bindings/phy/apple,atcphy.yaml | 210 +++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 211 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/apple,atcphy.yaml b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..eb14010557c94f313b54b528e2d4039fe540062a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
> @@ -0,0 +1,210 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Apple Type-C PHY (ATCPHY)
> +
> +maintainers:
> + - Sven Peter <sven@...nel.org>
> +
> +description:
> + The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
> + USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs.
> +
> + The PHY handles muxing between these different protocols and also provides the
> + reset controller for the attached dwc3 USB controller.
> +
> + The PHY is designed for USB4 operation and does not handle individual
> + differential pairs as distinct DisplayPort lanes. Any reference to lane in
> + this binding hence refers to two differential pairs (RX and TX) as used in USB
> + terminology.
> +
> +properties:
> + compatible:
> + enum:
> + - apple,t6000-atcphy
> + - apple,t6000-atcphy-dp-only # PHY hardwired to DP-to-HDMI converter on M2 Pro MacBook
The comment is misleading, "t6000-atcphy-dp-only" would be for M1
Pro/Max Macbooks. M2 Pro/Max Macbooks use the same design so the
corresponding "apple,t6020-atcphy-dp-only" compatible is missing.
I'm not sure this is the correct design though as the HW block is
identical to "apple,t6000-atcphy".
I think it might be better to have either the DRM KMS driver or a
custom DP->HDMI drm_bridge switch the mode to DP-only.
Or atcphy could initialize itself to DP-only based on the available
ports.
> + - apple,t6020-atcphy
> + - apple,t8103-atcphy
> + - apple,t8112-atcphy
> +
> + reg:
> + minItems: 5
> + maxItems: 5
> +
> + reg-names:
> + items:
> + - const: core
> + - const: lpdptx
> + - const: axi2af
> + - const: usb2phy
> + - const: pipehandler
> +
> + "#phy-cells":
> + const: 1
> +
> + "#reset-cells":
> + const: 0
> +
> + orientation-switch:
> + type: boolean
> + description:
> + The PHY handles swapping lanes if the Type-C connector is flipped.
> +
> + mode-switch:
> + type: boolean
> + description:
> + The PHY handles muxing between USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort.
These two properties could be referenced from
/schemas/usb/usb-switch.yaml, see
https://lore.kernel.org/linux-devicetree/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com/
> + power-domains:
> + minItems: 1
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output endpoint of the PHY to the Type-C connector
Not sure if it's justified to mention the hardwired DP->HDMI converter
in 14-/16-inch Macbooks Pro here as well.
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB3 controller
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the DisplayPort controller
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB4/Thunderbolt controller
> +
> + apple,tunable-axi2af:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + AXI2AF tunables.
> +
> + This array is filled with 3-tuples each containing three 32-bit values
> + <register offset>, <mask>, and <value> by the bootloader.
> + The driver will use these to configure the PHY by reading from each
> + register, ANDing it with <mask>, ORing it with <value>, and storing the
> + result back to the register.
> + These values slightly differ even between different chips of the same
> + generation and are likely calibration values determined by Apple at
> + manufacturing time.
> +
> + apple,tunable-common:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Common tunables required for all modes, see apple,tunable-axi2af for details.
> +
> + apple,tunable-fuses:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Fuse based tunables required for all modes, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-usb:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane1-usb:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-cio:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB4/Thunderbolt ("converged IO") tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane1-cio:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB4/Thunderbolt ("converged IO") tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-dp:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + DisplayPort tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
> + and not to an individual DisplayPort differential lane.
> +
> + apple,tunable-lane1-dp:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + DisplayPort tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
> + and not to an individual DisplayPort differential lane.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#phy-cells"
> + - "#reset-cells"
> + - orientation-switch
> + - mode-switch
any reason not to require "ports"? This would be carried over from
usb-switch
Janne
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