[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250822060609.djvsm5nmryit5ypl@vireshk-i7>
Date: Fri, 22 Aug 2025 11:36:09 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Judith Mendez <jm@...com>
Cc: Nishanth Menon <nm@...com>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Bryan Brattlof <bb@...com>, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org
Subject: Re: [PATCH 0/3] OPP: Support more speed grades and silicon revisions
On 18-08-25, 14:26, Judith Mendez wrote:
> As the AM62x, AM62ax, and AM62px SoC families mature, more speed
> grades are established and more silicon revisions are released. This
> patch series adds support for more speed grades on AM62Px SoCs in
> ti-cpufreq. Also allow all silicon revisions across AM62x, AM62Px,
> and AM62Ax SoCs to use the already established OPPs and instead determine
> approprate OPP application with speed grade efuse parsing.
>
> Also fix 1GHz OPP which according to device datasheet [0], also supports
> speed grade "O".
>
> [0] https://www.ti.com/lit/gpn/am62p
>
> Judith Mendez (3):
> cpufreq: ti: Support more speed grades on AM62Px SoC
> cpufreq: ti: Allow all silicon revisions to support OPPs
> arm64: dts: ti: k3-am62p: Fix supported hardware for 1GHz OPP
Applied. Thanks.
--
viresh
Powered by blists - more mailing lists