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Message-ID: <3a936b3b-0599-4b0a-83a8-52b899c24125@kernel.org>
Date: Fri, 22 Aug 2025 08:38:57 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Ravi Patel <ravi.patel@...sung.com>, jesper.nilsson@...s.com,
 mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, s.nawrocki@...sung.com,
 cw00.choi@...sung.com, alim.akhtar@...sung.com, linus.walleij@...aro.org,
 tomasz.figa@...il.com, catalin.marinas@....com, will@...nel.org,
 arnd@...db.de
Cc: ksk4725@...sia.com, kenkim@...sia.com, pjsin865@...sia.com,
 gwk1013@...sia.com, hgkim05@...sia.com, mingyoungbo@...sia.com,
 smn1196@...sia.com, pankaj.dubey@...sung.com, shradha.t@...sung.com,
 inbaraj.e@...sung.com, swathi.ks@...sung.com, hrishikesh.d@...sung.com,
 dj76.yang@...sung.com, hypmean.kim@...sung.com,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-samsung-soc@...r.kernel.org, linux-arm-kernel@...s.com,
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-gpio@...r.kernel.org, soc@...ts.linux.dev
Subject: Re: [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8
 SoC support

On 21/08/2025 14:32, Ravi Patel wrote:
> From: SungMin Park <smn1196@...sia.com>
> 
> Add initial device tree support for Axis ARTPEC-8 SoC.
> 
> This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.
> 
> Signed-off-by: SungMin Park <smn1196@...sia.com>
> Signed-off-by: SeonGu Kang <ksk4725@...sia.com>
> Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
...

> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

No CPU mask?

> +			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +};


Best regards,
Krzysztof

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