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Message-ID: <aKgPr3mUcIsd1iuT@Asurada-Nvidia>
Date: Thu, 21 Aug 2025 23:35:27 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Jason Gunthorpe <jgg@...dia.com>
CC: Ethan Zhao <etzhao1900@...il.com>, <robin.murphy@....com>,
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Subject: Re: [PATCH v3 5/5] pci: Suspend iommu function prior to resetting a
device
On Thu, Aug 21, 2025 at 10:07:41AM -0300, Jason Gunthorpe wrote:
> On Tue, Aug 19, 2025 at 02:59:07PM -0700, Nicolin Chen wrote:
> > c) multiple pci_devs with their own RIDs
> >
> > In this case, either FLR or IOMMU only resets the PF. That
> > being said, VFs might be affected since PF is resetting?
> > If there is an issue, I don't see it coming from the IOMMU-
> > level reset..
>
> It would still allow the ATS issue from the VF side. The VF could be
> pushing an invalidation during the PF reset that will get clobbered.
>
> I haven't fully checked but I think Linux doesn't really (easially?)
> allow resetting a PF while a VF is present...
Hmm, what if the PF encountered some fault? Does Linux have a choice
not to reset PF?
> Arguably if the PF is reset the VFs should have their translations
> blocked too.
Yea, that sounds plausible to me. But, prior to that (an IOMMU-level
reset), should VFs be first reset at the PCI level?
Thanks
Nicolin
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