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Message-ID: <e0c5b9b4-889f-4571-b265-fb6b2885871a@kernel.org>
Date: Sun, 24 Aug 2025 10:16:33 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Denzeel Oliva <wachiturroxd150@...il.com>, Conor Dooley <conor@...nel.org>
Cc: Sylwester Nawrocki <s.nawrocki@...sung.com>,
 Chanwoo Choi <cw00.choi@...sung.com>, Alim Akhtar <alim.akhtar@...sung.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, linux-samsung-soc@...r.kernel.org,
 linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: clock: exynos990: Reorder IDs clocks
 and extend

On 23/08/2025 19:27, Denzeel Oliva wrote:
>> This looks like a massive ABI break, where is the justification for
>> doing it?
>>
>> Cheers,
>> Conor.
> 
> Hi Conor,
> 
> I reordered because the current IDs don’t match CMU_TOP:
> the PLL mux select is in PLL_CON0, not CON3, which gave wrong/low rates.


IDs are abstract, they cannot give wrong/low rates.

> I also added DPU/CMUREF and a missing fixed-factor path to stop bad rates
> and clk_summary hangs on hardware.


Not really related to ABI.

None of these justify changing the ABI or I don't understand the problem
at all.

Best regards,
Krzysztof

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