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Message-ID: <20250824-new-messy-raccoon-1c26b7@kuoka>
Date: Sun, 24 Aug 2025 11:25:08 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: E Shattow <e@...eshell.de>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Hal Feng <hal.feng@...rfivetech.com>, Minda Chen <minda.chen@...rfivetech.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: memory-controllers: add StarFive
JH7110 SoC DMC
On Sat, Aug 23, 2025 at 03:01:41AM -0700, E Shattow wrote:
> Describe JH7110 SoC DDR external memory interface.
>
> Signed-off-by: E Shattow <e@...eshell.de>
> ---
> .../starfive,jh7110-dmc.yaml | 74 +++++++++++++++++++
> 1 file changed, 74 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
There is no memory controllers driver change, so I am fine if this goes
via SoC/DTS tree. If you want me to pick it up, please ping on IRC.
Best regards,
Krzysztof
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