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Message-ID: <3c2b62e219e50555319da369cafa9a8f79eb71e8.camel@icenowy.me>
Date: Mon, 25 Aug 2025 01:14:18 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Hal Feng <hal.feng@...rfivetech.com>, Conor Dooley
<conor+dt@...nel.org>, Emil Renner Berthing
<emil.renner.berthing@...onical.com>, Heinrich Schuchardt
<heinrich.schuchardt@...onical.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Palmer Dabbelt
<palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Albert Ou
<aou@...s.berkeley.edu>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [RFC 1/3] dt-bindings: riscv: Add StarFive JH7110S SoC and
VisionFive 2 Lite board
在 2025-08-21星期四的 18:09 +0800,Hal Feng写道:
> Add device tree bindings for the StarFive JH7110S SoC
> and the VisionFive 2 Lite board equipped with it.
>
> JH7110S SoC is an industrial SoC which can run at -40~85 degrees
> centigrade
> and up to 1.25GHz. Its CPU cores and peripherals are mostly similar
> to
> those of the JH7110 SoC.
>
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
> Documentation/devicetree/bindings/riscv/starfive.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml
> b/Documentation/devicetree/bindings/riscv/starfive.yaml
> index 7ef85174353d..a2952490709f 100644
> --- a/Documentation/devicetree/bindings/riscv/starfive.yaml
> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
> @@ -33,6 +33,11 @@ properties:
> - starfive,visionfive-2-v1.3b
> - const: starfive,jh7110
>
> + - items:
> + - enum:
> + - starfive,visionfive-2-lite
> + - const: starfive,jh7110s
I suggest adding starfive,jh7110 as a fallback here, as it's the SoC
best known to most softwares, and JH7110S shouldn't have any difference
to JH7110 other than binning.
> +
> additionalProperties: true
>
> ...
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