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Message-ID: <20250827-negligee-kinship-7832ba58deba@spud>
Date: Wed, 27 Aug 2025 19:03:44 +0100
From: Conor Dooley <conor@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Ben Zong-You Xie <ben717@...estech.com>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1] dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets value
From: Conor Dooley <conor.dooley@...rochip.com>
The QiLai implementation of this cache controller uses a cache-sets of
2048, and mandates it in an if/else block - but the definition of the
property only permits 1024. Add 2048 as an option, and deny its use
outside of the QiLai.
Fixes: 51b081cdb9237 ("dt-bindings: cache: add QiLai compatible to ax45mp")
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
CC: Conor Dooley <conor@...nel.org>
CC: Rob Herring <robh@...nel.org>
CC: Krzysztof Kozlowski <krzk+dt@...nel.org>
CC: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
CC: Ben Zong-You Xie <ben717@...estech.com>
CC: devicetree@...r.kernel.org
CC: linux-kernel@...r.kernel.org
---
.../devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
index 4de5bb2e5f246..b135ffa4ab6b8 100644
--- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
+++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
@@ -47,7 +47,7 @@ properties:
const: 2
cache-sets:
- const: 1024
+ enum: [1024, 2048]
cache-size:
enum: [131072, 262144, 524288, 1048576, 2097152]
@@ -81,6 +81,10 @@ allOf:
const: 2048
cache-size:
const: 2097152
+ else:
+ properties:
+ cache-sets:
+ const: 1024
examples:
- |
--
2.47.2
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