linux-kernel - Re: [PATCH v3 5/6] dt-bindings: soc: fsl: qe: Add support of IRQ in QE GPIO

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAL_JsqKFvVQTVXV8mWX0z1=hd3nLDzLXq-0G_0bshMCvQ5kVvA@mail.gmail.com>
Date: Thu, 28 Aug 2025 08:28:33 -0500
From: Rob Herring <robh@...nel.org>
To: Christophe Leroy <christophe.leroy@...roup.eu>
Cc: Qiang Zhao <qiang.zhao@....com>, Linus Walleij <linus.walleij@...aro.org>, 
	Bartosz Golaszewski <brgl@...ev.pl>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org, 
	linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 5/6] dt-bindings: soc: fsl: qe: Add support of IRQ in
 QE GPIO

On Mon, Aug 25, 2025 at 2:20 AM Christophe Leroy
<christophe.leroy@...roup.eu> wrote:
>
> In the QE, a few GPIOs are IRQ capable. Similarly to
> commit 726bd223105c ("powerpc/8xx: Adding support of IRQ in MPC8xx
> GPIO"), add IRQ support to QE GPIO.
>
> Add property 'fsl,qe-gpio-irq-mask' similar to
> 'fsl,cpm1-gpio-irq-mask' that define which of the GPIOs have IRQs.

Why do you need to know this? The ones that have interrupts will be
referenced by an 'interrupts' property somewhere.

> Here is an exemple for port B of mpc8323 which has IRQs for

typo

> GPIOs PB7, PB9, PB25 and PB27.
>
>         qe_pio_b: gpio-controller@...8 {
>                 compatible = "fsl,mpc8323-qe-pario-bank";
>                 reg = <0x1418 0x18>;
>                 interrupts = <4 5 6 7>;
>                 interrupt-parent = <&qepic>;
>                 gpio-controller;
>                 #gpio-cells = <2>;
>                 fsl,qe-gpio-irq-mask = <0x01400050>;
>         };

You are missing #interrupt-cells and interrupt-controller properties.

With multiple new properties, this should be converted to schema first.

>
> Signed-off-by: Christophe Leroy <christophe.leroy@...roup.eu>
> ---
>  .../bindings/soc/fsl/cpm_qe/qe/par_io.txt     | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt
> index 09b1b05fa677..829fe9a3d70c 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt
> @@ -32,6 +32,15 @@ Required properties:
>    "fsl,mpc8323-qe-pario-bank".
>  - reg : offset to the register set and its length.
>  - gpio-controller : node to identify gpio controllers.
> +Optional properties:
> +- fsl,qe-gpio-irq-mask : For banks having interrupt capability this item tells
> +  which ports have an associated interrupt (ports are listed in the same order
> +  as in QE ports registers)
> +- interrupts : This property provides the list of interrupt for each GPIO having
> +  one as described by the fsl,cpm1-gpio-irq-mask property. There should be as
> +  many interrupts as number of ones in the mask property. The first interrupt in
> +  the list corresponds to the most significant bit of the mask.
> +- interrupt-parent : Parent for the above interrupt property.
>
>  Example:
>         qe_pio_a: gpio-controller@...0 {
> @@ -42,6 +51,16 @@ Example:
>                 gpio-controller;
>           };
>
> +       qe_pio_b: gpio-controller@...8 {
> +               #gpio-cells = <2>;
> +               compatible = "fsl,mpc8323-qe-pario-bank";
> +               reg = <0x1418 0x18>;
> +               interrupts = <4 5 6 7>;
> +               fsl,qe-gpio-irq-mask = <0x01400050>;
> +               interrupt-parent = <&qepic>;
> +               gpio-controller;
> +         };
> +
>         qe_pio_e: gpio-controller@...0 {
>                 #gpio-cells = <2>;
>                 compatible = "fsl,mpc8360-qe-pario-bank",
> --
> 2.49.0
>