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Message-ID: <cb5cab2b-5cd1-4fec-99d4-9e8d9517b487@amd.com>
Date: Thu, 28 Aug 2025 09:35:25 +0100
From: Alejandro Lucero Palau <alucerop@....com>
To: Terry Bowman <terry.bowman@....com>, dave@...olabs.net,
 jonathan.cameron@...wei.com, dave.jiang@...el.com,
 alison.schofield@...el.com, dan.j.williams@...el.com, bhelgaas@...gle.com,
 shiju.jose@...wei.com, ming.li@...omail.com,
 Smita.KoralahalliChannabasappa@....com, rrichter@....com,
 dan.carpenter@...aro.org, PradeepVineshReddy.Kodamati@....com,
 lukas@...ner.de, Benjamin.Cheatham@....com,
 sathyanarayanan.kuppuswamy@...ux.intel.com, linux-cxl@...r.kernel.org,
 ira.weiny@...el.com
Cc: linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH v11 04/23] cxl/pci: Remove unnecessary CXL RCH handling
 helper functions


On 8/27/25 02:35, Terry Bowman wrote:
> cxl_handle_rdport_cor_ras() and cxl_handle_rdport_ras() are specific
> to Restricted CXL Host (RCH) handling. Improve readability and
> maintainability by replacing these and instead using the common
> cxl_handle_cor_ras() and cxl_handle_ras() functions.
>
> Signed-off-by: Terry Bowman <terry.bowman@....com>


Good and simple.


Reviewed-by: Alejandro Lucero <alucerop@....com>


> ---
>
> Changes in v10->v11:
> - New patch
> ---
>   drivers/cxl/core/ras.c | 16 ++--------------
>   1 file changed, 2 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/cxl/core/ras.c b/drivers/cxl/core/ras.c
> index 544a0d8773fa..0875ce8116ff 100644
> --- a/drivers/cxl/core/ras.c
> +++ b/drivers/cxl/core/ras.c
> @@ -233,12 +233,6 @@ static void header_log_copy(void __iomem *ras_base, u32 *log)
>   	}
>   }
>   
> -static void cxl_handle_rdport_cor_ras(struct cxl_dev_state *cxlds,
> -				      struct cxl_dport *dport)
> -{
> -	return cxl_handle_cor_ras(cxlds, dport->regs.ras);
> -}
> -
>   /*
>    * Log the state of the RAS status registers and prepare them to log the
>    * next error status. Return 1 if reset needed.
> @@ -276,12 +270,6 @@ static bool cxl_handle_ras(struct cxl_dev_state *cxlds, void __iomem *ras_base)
>   	return true;
>   }
>   
> -static bool cxl_handle_rdport_ras(struct cxl_dev_state *cxlds,
> -				  struct cxl_dport *dport)
> -{
> -	return cxl_handle_ras(cxlds, dport->regs.ras);
> -}
> -
>   /*
>    * Copy the AER capability registers using 32 bit read accesses.
>    * This is necessary because RCRB AER capability is MMIO mapped. Clear the
> @@ -350,9 +338,9 @@ static void cxl_handle_rdport_errors(struct cxl_dev_state *cxlds)
>   
>   	pci_print_aer(pdev, severity, &aer_regs);
>   	if (severity == AER_CORRECTABLE)
> -		cxl_handle_rdport_cor_ras(cxlds, dport);
> +		cxl_handle_cor_ras(cxlds, dport->regs.ras);
>   	else
> -		cxl_handle_rdport_ras(cxlds, dport);
> +		cxl_handle_ras(cxlds, dport->regs.ras);
>   }
>   
>   void cxl_cor_error_detected(struct pci_dev *pdev)

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