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Message-ID: <CAPaKu7SYptoVNfUgT8ok1mwRk9BZpU7z_XG=vE2_nkJ5hAj_8Q@mail.gmail.com>
Date: Fri, 29 Aug 2025 14:50:21 -0700
From: Chia-I Wu <olvaffe@...il.com>
To: Steven Price <steven.price@....com>
Cc: Boris Brezillon <boris.brezillon@...labora.com>, Liviu Dudau <liviu.dudau@....com>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] drm/panthor: add custom ASN hash support

On Fri, Aug 29, 2025 at 6:41 AM Steven Price <steven.price@....com> wrote:
>
> On 28/08/2025 21:18, Chia-I Wu wrote:
> > Some socs such as mt8196 require custom ASN hash.
>
> I don't know the full details of this, but I'm puzzled by the "require"
> here.
>
> AIUI the "custom ASN hash support" (or L2C_SLICE_HASH as it was renamed)
> affects the efficiency of the L2 caches in the GPU. It basically
> determines how addresses are striped over the individual caches.
>
> So (unless there is a specific errata) not setting a custom hash will
> work just fine, but the performance might be slightly reduced.
All memory access results in faults unless custom ASN hash is enabled on mt8196.

It sounds like this is a soc-specific quirk.  I will check with the
vendor, and likely turn this into a quirk.

>
> kbase provides both a DT option and a module parameter which can be used
> to override the defaults (although the parameter descriptions say "for
> testing" which I think is somewhat telling).
>
> How we should describe this somewhat depends on whether this is a
> specific workaround for a SoC - in which case Boris's suggestion of
> using a different compatible string and panthor_soc_data seems like a
> good choice. Or if this is exposed as a general "tuning" parameter, in
> which case this might be appropriate.
>
> I believe the tuning is related to more than just a SoC (the external
> memory system has an impact). So I guess a DT level knob makes most
> sense here.
>
> Steve
>
> > Chia-I Wu (2):
> >   dt-bindings: gpu: mali-valhall-csf: add asn-hash
> >   drm/panthor: add asn-hash support
> >
> >  .../bindings/gpu/arm,mali-valhall-csf.yaml    |  8 ++++++
> >  drivers/gpu/drm/panthor/panthor_device.c      | 28 +++++++++++++++++++
> >  drivers/gpu/drm/panthor/panthor_device.h      |  6 ++++
> >  drivers/gpu/drm/panthor/panthor_gpu.c         | 17 +++++++++++
> >  drivers/gpu/drm/panthor/panthor_regs.h        |  4 +++
> >  5 files changed, 63 insertions(+)
> >
>

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