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Message-Id: <20250830-msm8953-spi-fix-v1-2-89950eaf10fe@mainlining.org>
Date: Sat, 30 Aug 2025 23:13:20 +0200
From: Barnabás Czémán <barnabas.czeman@...nlining.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Gianluca Boiano <morf3089@...il.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Barnabás Czémán <barnabas.czeman@...nlining.org>
Subject: [PATCH 2/3] arm64: dts: qcom: msm8953: correct SPI pinctrls
SPI pinctrls should handle 4 pins MOSI, MISO, CLK and CS.
This change adding the missing pins for pinctrls and correcting
CS pins according to downstream sources.
Fixes: be69109e93c78 ("arm64: dts: qcom: msm8953: add SPI interfaces")
Signed-off-by: Barnabás Czémán <barnabas.czeman@...nlining.org>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 102 ++++++++++++++++++++++++++--------
1 file changed, 78 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 14dd17278ae0850df1dafad19a569ffc5afb174b..1b3e68aed9450f61d14fe6c16a4dd513c815c6da 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -775,45 +775,99 @@ i2c_8_sleep: i2c-8-sleep-state {
};
spi_3_default: spi-3-default-state {
- pins = "gpio10", "gpio11";
- function = "blsp_spi3";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio10";
+ function = "blsp_spi3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio8", "gpio9", "gpio11";
+ function = "blsp_spi3";
+ drive-strength = <12>;
+ bias-disable;
+ };
};
spi_3_sleep: spi-3-sleep-state {
- pins = "gpio10", "gpio11";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio10";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio8", "gpio9", "gpio11";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
spi_5_default: spi-5-default-state {
- pins = "gpio18", "gpio19";
- function = "blsp_spi5";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio18";
+ function = "blsp_spi5";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio16", "gpio17", "gpio19";
+ function = "blsp_spi5";
+ drive-strength = <12>;
+ bias-disable;
+ };
};
spi_5_sleep: spi-5-sleep-state {
- pins = "gpio18", "gpio19";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio18";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio16", "gpio17", "gpio19";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
spi_6_default: spi-6-default-state {
- pins = "gpio22", "gpio23";
- function = "blsp_spi6";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio22";
+ function = "blsp_spi6";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio20", "gpio21", "gpio23";
+ function = "blsp_spi6";
+ drive-strength = <12>;
+ bias-disable;
+ };
};
spi_6_sleep: spi-6-sleep-state {
- pins = "gpio22", "gpio23";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
+ cs-pins {
+ pins = "gpio22";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ spi-pins {
+ pins = "gpio20", "gpio21", "gpio23";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
uart_5_default: uart-5-default-state {
--
2.51.0
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