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Message-ID: <86zfbecnf3.wl-maz@kernel.org>
Date: Mon, 01 Sep 2025 14:28:16 +0100
From: Marc Zyngier <maz@...nel.org>
To: Gyujeong Jin <wlsrbwjd7232@...il.com>
Cc: oliver.upton@...ux.dev,
	joey.gouly@....com,
	suzuki.poulose@....com,
	yuzenghui@...wei.com,
	catalin.marinas@....com,
	will@...nel.org,
	kvmarm@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	gyutrange <wlsrbwjd643@...er.com>
Subject: Re: [PATCH] KVM: arm64: nested: Fix VA sign extension in VNCR/TLBI paths

On Mon, 01 Sep 2025 13:45:20 +0100,
Gyujeong Jin <wlsrbwjd7232@...il.com> wrote:
> 
> From: gyutrange <wlsrbwjd643@...er.com>
> 
> Signed-off-by: gyutrange <wlsrbwjd643@...er.com>

Where is the commit message?

> ---
>  arch/arm64/kvm/nested.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> index 77db81bae86f..eaa6dd9da086 100644
> --- a/arch/arm64/kvm/nested.c
> +++ b/arch/arm64/kvm/nested.c
> @@ -1169,7 +1169,7 @@ int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu)
>  
>  static u64 read_vncr_el2(struct kvm_vcpu *vcpu)
>  {
> -	return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 48);
> +	return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 47);
>  }
>  

This code is not there for sign extension of the VA. It is there for
the propagation of bit 48 (yes, bit 48, not a typo) in RESS and the
top bits of BADDR. D24.2.206 has all the details for this.

Furthermore, we already check that the VA is canonical at the point of
establishing the translation (see the references to R_YYVYV and
I_THCZK in the S1 PTW code), and don't install a TLB in that case.

But maybe you have spotted something I didn't, so some explanations
would be very welcome.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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