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Message-ID: <87h5xl0xv1.ffs@tglx>
Date: Tue, 02 Sep 2025 15:48:02 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>, LKML
 <linux-kernel@...r.kernel.org>
Cc: Jens Axboe <axboe@...nel.dk>, Peter Zijlstra <peterz@...radead.org>,
 "Paul E. McKenney" <paulmck@...nel.org>, Boqun Feng
 <boqun.feng@...il.com>, Paolo Bonzini <pbonzini@...hat.com>, Sean
 Christopherson <seanjc@...gle.com>, Wei Liu <wei.liu@...nel.org>, Dexuan
 Cui <decui@...rosoft.com>, x86@...nel.org, Arnd Bergmann <arnd@...db.de>,
 Heiko Carstens <hca@...ux.ibm.com>, Christian Borntraeger
 <borntraeger@...ux.ibm.com>, Sven Schnelle <svens@...ux.ibm.com>, Huacai
 Chen <chenhuacai@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>
Subject: Re: [patch V2 14/37] rseq: Cache CPU ID and MM CID values

On Mon, Aug 25 2025 at 14:19, Mathieu Desnoyers wrote:
> On 2025-08-23 12:39, Thomas Gleixner wrote:
>> In preparation for rewriting RSEQ exit to user space handling provide
>> storage to cache the CPU ID and MM CID values which were written to user
>> space. That prepares for a quick check, which avoids the update when
>> nothing changed.
>
> What should we do about the numa node_id field ?
>
> On pretty much all arch except powerpc (AFAIK) it's invariant for
> the topology, so derived from cpu_id.
>
> On powerpc, we could perhaps reset the cached cpu_id to ~0U for
> each thread to trigger an update ? Or just don't care about this ?

It's invariant on powerPC as well after the CPU was [hot]added to the
kernel.

Otherwise any usage of cpu_to_node() would be broken on powerPC, no?

Thanks,

        tglx

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