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Message-ID: <fcdjq6mevt2d2oz2o43ityogugv5ahrwedkweyqe6qoxqmrfnv@y56wqkllssqu>
Date: Tue, 2 Sep 2025 09:47:52 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Prasad Kumpatla <quic_pkumpatl@...cinc.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Srinivas Kandagatla <srini@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, cros-qcom-dts-watchers@...omium.org,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sound@...r.kernel.org, kernel@....qualcomm.com,
Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>, Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v8 5/9] arm64: dts: qcom: qcs6490-audioreach: Modify
LPASS macros clock settings for audioreach
On Thu, Aug 21, 2025 at 10:19:10AM +0530, Prasad Kumpatla wrote:
> From: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
>
> Modify and enable WSA, VA, RX and TX lpass macros and lpass_tlmm clock
> settings. For audioreach solution mclk, npl and fsgen clocks are enabled
> through the q6prm clock driver.
>
> For qcs6490 RX drives clk from TX CORE which is mandated from DSP side,
> Unlike dedicated core clocks. Core TX clk is used for both RX and
> WSA as per DSP recommendations.
>
This differs from all other platforms, so please make sure the commit
message explains why.
As with patch 1, is this specific to qcs6490?
Regards,
Bjorn
> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@...cinc.com>
> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@...cinc.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> ---
> .../boot/dts/qcom/qcs6490-audioreach.dtsi | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
> index 282938c042f7..6d3a9e171066 100644
> --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
> @@ -12,6 +12,67 @@
> #include <dt-bindings/sound/qcom,q6afe.h>
> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
>
> +&lpass_rx_macro {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&lpass_va_macro>;
> + clock-names = "mclk",
> + "npl",
> + "macro",
> + "dcodec",
> + "fsgen";
> +};
> +
> +&lpass_tlmm {
> + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + clock-names = "core",
> + "audio";
> +};
> +
> +&lpass_tx_macro {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&lpass_va_macro>;
> + clock-names = "mclk",
> + "npl",
> + "macro",
> + "dcodec",
> + "fsgen";
> +};
> +
> +&lpass_va_macro {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + clocks = <&q6prmcc LPASS_CLK_ID_VA_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + clock-names = "mclk",
> + "macro",
> + "dcodec";
> +};
> +
> +&lpass_wsa_macro {
> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&lpass_va_macro>;
> + clock-names = "mclk",
> + "npl",
> + "macro",
> + "dcodec",
> + "fsgen";
> +};
> +
> &remoteproc_adsp_glink {
> /delete-node/ apr;
>
> --
> 2.34.1
>
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