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Message-ID: <03182857-2d74-42f5-850f-d5edca9ad19c@collabora.com>
Date: Tue, 2 Sep 2025 02:00:40 +0200
From: Michael Riesch <michael.riesch@...labora.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Kever Yang <kever.yang@...k-chips.com>,
Jagan Teki <jagan@...rulasolutions.com>,
Sebastian Reichel <sebastian.reichel@...labora.com>,
Diederik de Haas <didi.debian@...ow.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Collabora Kernel Team <kernel@...labora.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH v3 7/7] arm64: dts: rockchip: add mipi csi-2 dphy nodes to
rk3588
Hi all,
On 9/1/25 22:47, Michael Riesch via B4 Relay wrote:
> From: Michael Riesch <michael.riesch@...labora.com>
>
> The Rockchip RK3588 features two MIPI CSI-2 DPHYs. Add the device
> tree nodes for them.
>
> Signed-off-by: Michael Riesch <michael.riesch@...labora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 33 +++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> index 70f03e68ba55..eedf93247e9c 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> @@ -621,6 +621,16 @@ php_grf: syscon@...b0000 {
> reg = <0x0 0xfd5b0000 0x0 0x1000>;
> };
>
> + csidphy0_grf: syscon@...b4000 {
> + compatible = "rockchip,rk3588-csidphy-grf", "syscon";
> + reg = <0x0 0xfd5b4000 0x0 0x1000>;
> + };
> +
> + csidphy1_grf: syscon@...b5000 {
> + compatible = "rockchip,rk3588-csidphy-grf", "syscon";
> + reg = <0x0 0xfd5b5000 0x0 0x1000>;
> + };
> +
> pipe_phy0_grf: syscon@...bc000 {
> compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
> reg = <0x0 0xfd5bc000 0x0 0x100>;
> @@ -3052,6 +3062,29 @@ mipidcphy1: phy@...b0000 {
> <&cru SRST_S_MIPI_DCPHY1>;
> reset-names = "m_phy", "apb", "grf", "s_phy";
> #phy-cells = <1>;
Not my day today, apparently. status = "disabled"; is removed from the
mipicdphy1 node.
Hence, there is going to be a v4 in which I fix this -- but maybe you
all can still review the series.
Best regards,
Michael
> + };
> +
> + csi_dphy0: phy@...c0000 {
> + compatible = "rockchip,rk3588-csi-dphy";
> + reg = <0x0 0xfedc0000 0x0 0x8000>;
> + clocks = <&cru PCLK_CSIPHY0>;
> + clock-names = "pclk";
> + #phy-cells = <0>;
> + resets = <&cru SRST_P_CSIPHY0>, <&cru SRST_CSIPHY0>;
> + reset-names = "apb", "phy";
> + rockchip,grf = <&csidphy0_grf>;
> + status = "disabled";
> + };
> +
> + csi_dphy1: phy@...c8000 {
> + compatible = "rockchip,rk3588-csi-dphy";
> + reg = <0x0 0xfedc8000 0x0 0x8000>;
> + clocks = <&cru PCLK_CSIPHY1>;
> + clock-names = "pclk";
> + #phy-cells = <0>;
> + resets = <&cru SRST_P_CSIPHY1>, <&cru SRST_CSIPHY1>;
> + reset-names = "apb", "phy";
> + rockchip,grf = <&csidphy1_grf>;
> status = "disabled";
> };
>
>
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