linux-kernel - Re: [PATCH 3/5] arm64: cpucaps: Add GICv5 Legacy vCPU interface (GCIE

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Message-ID: <e823610a-e145-4627-9968-6d2dcc873184@arm.com>
Date: Tue, 2 Sep 2025 09:23:34 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Sascha Bischoff <Sascha.Bischoff@....com>,
 "linux-arm-kernel@...ts.infradead.org"
 <linux-arm-kernel@...ts.infradead.org>,
 "kvmarm@...ts.linux.dev" <kvmarm@...ts.linux.dev>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 "kvm@...r.kernel.org" <kvm@...r.kernel.org>
Cc: nd <nd@....com>, "maz@...nel.org" <maz@...nel.org>,
 "oliver.upton@...ux.dev" <oliver.upton@...ux.dev>,
 Joey Gouly <Joey.Gouly@....com>, "yuzenghui@...wei.com"
 <yuzenghui@...wei.com>, "will@...nel.org" <will@...nel.org>,
 "tglx@...utronix.de" <tglx@...utronix.de>,
 "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
 Timothy Hayes <Timothy.Hayes@....com>
Subject: Re: [PATCH 3/5] arm64: cpucaps: Add GICv5 Legacy vCPU interface
 (GCIE_LEGACY) capability

On 28/08/2025 11:59, Sascha Bischoff wrote:
> Implement the GCIE_LEGACY capability as a system feature to be able to
> check for support from KVM. The type is explicitly
> ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE, which means that the capability
> is enabled early if all boot CPUs support it. Additionally, if this
> capability is enabled during boot, it prevents late onlining of CPUs
> that lack it, thereby avoiding potential mismatched configurations
> which would break KVM.
> 
> Signed-off-by: Sascha Bischoff <sascha.bischoff@....com>


> ---
>   arch/arm64/kernel/cpufeature.c | 15 +++++++++++++++
>   arch/arm64/tools/cpucaps       |  1 +
>   2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 9ad065f15f1d..afb3b10afd75 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2520,6 +2520,15 @@ test_has_mpam_hcr(const struct arm64_cpu_capabilities *entry, int scope)
>   	return idr & MPAMIDR_EL1_HAS_HCR;
>   }
>   
> +static bool
> +test_has_gicv5_legacy(const struct arm64_cpu_capabilities *entry, int scope)
> +{
> +	if (!this_cpu_has_cap(ARM64_HAS_GICV5_CPUIF))
> +		return false;
> +
> +	return !!(read_sysreg_s(SYS_ICC_IDR0_EL1) & ICC_IDR0_EL1_GCIE_LEGACY);
> +}
> +
>   static const struct arm64_cpu_capabilities arm64_features[] = {
>   	{
>   		.capability = ARM64_ALWAYS_BOOT,
> @@ -3131,6 +3140,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
>   		.matches = has_cpuid_feature,
>   		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP)
>   	},
> +	{
> +		.desc = "GICv5 Legacy vCPU interface",
> +		.type = ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE,

This is the right type for the capability intended, running the test on 
each boot time CPUs and setting the cap accordingly.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>