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Message-ID: <20250903100929.2598626-1-h-shenoy@ti.com>
Date: Wed, 3 Sep 2025 15:39:29 +0530
From: Harikrishna Shenoy <h-shenoy@...com>
To: <jyri.sarha@....fi>, <tomi.valkeinen@...asonboard.com>,
        <maarten.lankhorst@...ux.intel.com>, <mripard@...nel.org>,
        <tzimmermann@...e.de>, <airlied@...il.com>, <simona@...ll.ch>,
        <bparrot@...com>, <sam@...nborg.org>,
        <dri-devel@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
CC: <h-shenoy@...com>
Subject: [PATCH] drm/tidss: Update Videoport SYNC LOST IRQ bit

Update VP SYNC LOST Bit as per register description for
DSS0_COMMON_VP_IRQENABLE_0 give in TRM.

Link:https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
Table 12-597. DSS0_COMMON_VP_IRQENABLE_0

Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display SubSystem")

Signed-off-by: Harikrishna Shenoy <h-shenoy@...com>
---
 drivers/gpu/drm/tidss/tidss_irq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tidss/tidss_irq.h b/drivers/gpu/drm/tidss/tidss_irq.h
index dd61f645f662..0194010a7fff 100644
--- a/drivers/gpu/drm/tidss/tidss_irq.h
+++ b/drivers/gpu/drm/tidss/tidss_irq.h
@@ -53,7 +53,7 @@ static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane)
 #define DSS_IRQ_VP_FRAME_DONE(ch)	DSS_IRQ_VP_BIT((ch), 0)
 #define DSS_IRQ_VP_VSYNC_EVEN(ch)	DSS_IRQ_VP_BIT((ch), 1)
 #define DSS_IRQ_VP_VSYNC_ODD(ch)	DSS_IRQ_VP_BIT((ch), 2)
-#define DSS_IRQ_VP_SYNC_LOST(ch)	DSS_IRQ_VP_BIT((ch), 3)
+#define DSS_IRQ_VP_SYNC_LOST(ch)	DSS_IRQ_VP_BIT((ch), 4)
 
 #define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane)	DSS_IRQ_PLANE_BIT((plane), 0)
 
-- 
2.34.1


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