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Message-ID: <20250904050940.2913567-1-h-shenoy@ti.com>
Date: Thu, 4 Sep 2025 10:39:40 +0530
From: Harikrishna Shenoy <h-shenoy@...com>
To: <nm@...com>, <vigneshr@...com>, <kristo@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <r-ravikumar@...com>,
<tomi.valkeinen@...com>, <a-bhatia1@...com>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <aradhya.bhatia@...ux.dev>,
<u-kumar1@...com>, <devarsht@...com>, <s-jain1@...com>
CC: <h-shenoy@...com>
Subject: [PATCH RESEND] arm64: dts: ti: k3-j721e-main: Update DSS EDP integration configuration register
Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
TRM Table 2-1 MAIN Domain Memory Map.
Link: https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
Fixes: 92c996f4ceab ("arm64: dts: ti: k3-j721e-*: add DP & DP PHY")
Signed-off-by: Harikrishna Shenoy <h-shenoy@...com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index ab3666ff4297..3fa7537d5414 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1863,7 +1863,7 @@ mhdp: dp-bridge@...0000 {
* the PHY driver.
*/
reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
- <0x00 0x04f40000 0x00 0x20>; /* DSS_EDP0_INTG_CFG_VP */
+ <0x00 0x04f40000 0x00 0x100>; /* DSS_EDP0_INTG_CFG_VP */
reg-names = "mhdptx", "j721e-intg";
clocks = <&k3_clks 151 36>;
--
2.34.1
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