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Message-ID: <20250905132328.9859-1-cn.liweihao@gmail.com>
Date: Fri, 5 Sep 2025 21:23:24 +0800
From: WeiHao Li <cn.liweihao@...il.com>
To: heiko@...ech.de,
robh@...nel.org
Cc: krzk+dt@...nel.org,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org,
WeiHao Li <cn.liweihao@...il.com>
Subject: [PATCH v1 0/4] clk/rockchip: Fix I2S 8CH mclk output for RK3368
I2S 8CH needs assign correct clock to output frequency wanted, this
serial fix it.
These changes were tested on a RK3368-based board with es8316 codec [1],
playback function is good.
[1] https://ieiao.github.io/wiki/embedded-dev/rockchip/rk3368
Tested-by: WeiHao Li <cn.liweihao@...il.com>
Signed-off-by: WeiHao Li <cn.liweihao@...il.com>
WeiHao Li (4):
clk: rockchip: rk3368: fix SCLK_I2S_8CH_OUT flags
dt-bindings: clock: rk3368: add CLK_I2S_8CH_PRE and CLK_I2S_8CH_FRAC
clk: rockchip: rk3368: use clock ids CLK_I2S_8CH_PRE and
CLK_I2S_8CH_FRAC
arm64: dts: rockchip: Assign I2S 8 channel clock for rk3368
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++
drivers/clk/rockchip/clk-rk3368.c | 6 +++---
include/dt-bindings/clock/rk3368-cru.h | 3 +++
3 files changed, 8 insertions(+), 3 deletions(-)
--
2.39.5
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