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Message-ID: <20250905132328.9859-5-cn.liweihao@gmail.com>
Date: Fri, 5 Sep 2025 21:23:28 +0800
From: WeiHao Li <cn.liweihao@...il.com>
To: heiko@...ech.de,
robh@...nel.org
Cc: krzk+dt@...nel.org,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org,
WeiHao Li <cn.liweihao@...il.com>
Subject: [PATCH v1 4/4] arm64: dts: rockchip: Assign I2S 8 channel clock for rk3368
I2S 8CH needs assign correct clock to output frequency wanted. This
patch assign CLK_I2S_8CH_FRAC as CLK_I2S_8CH_PRE parents.
Signed-off-by: WeiHao Li <cn.liweihao@...il.com>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cdcbc0a944..d931b5f5ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -862,6 +862,8 @@ i2s_8ch: i2s-8ch@...98000 {
compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff898000 0x0 0x1000>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ assigned-clocks = <&cru CLK_I2S_8CH_PRE>;
+ assigned-clock-parents = <&cru CLK_I2S_8CH_FRAC>;
clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
dmas = <&dmac_bus 0>, <&dmac_bus 1>;
--
2.39.5
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