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Message-ID: <20250905191136.f4akog3ewnhpggsa@lcpd911>
Date: Sat, 6 Sep 2025 00:41:36 +0530
From: Dhruva Gole <d-gole@...com>
To: Beleswar Padhi <b-padhi@...com>
CC: <nm@...com>, <vigneshr@...com>, <kristo@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <afd@...com>,
<u-kumar1@...com>, <hnagalla@...com>, <jm@...com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Wadim
Egorov <w.egorov@...tec.de>
Subject: Re: [PATCH v3 06/33] arm64: dts: ti: k3-am62: Enable remote
processors at board level
On Sep 05, 2025 at 10:48:19 +0530, Beleswar Padhi wrote:
> Remote Processors defined in top-level AM62x SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
>
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
>
> Signed-off-by: Beleswar Padhi <b-padhi@...com>
> Reviewed-by: Wadim Egorov <w.egorov@...tec.de>
> Tested-by: Wadim Egorov <w.egorov@...tec.de>
> Acked-by: Andrew Davis <afd@...com>
> ---
> v3: Changelog:
> 1. Carried A/B, T/B, R/B tags.
>
> Link to v2:
> https://lore.kernel.org/all/20250823160901.2177841-7-b-padhi@ti.com/
>
> v2: Changelog:
> 1. Re-ordered patch from [PATCH 21/33] to [PATCH v2 06/33].
>
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-22-b-padhi@ti.com/
>
> arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 1 +
> arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> index 10e6b5c08619..dcd22ff487ec 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> @@ -407,4 +407,5 @@ &wkup_r5fss0_core0 {
> mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> <&wkup_r5fss0_core0_memory_region>;
> + status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> index 6549b7efa656..75aed3a88284 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> @@ -128,6 +128,7 @@ wkup_r5fss0_core0: r5f@...00000 {
> ti,sci = <&dmsc>;
> ti,sci-dev-id = <121>;
> ti,sci-proc-ids = <0x01 0xff>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> index 13e1d36123d5..840772060cb1 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
> @@ -506,6 +506,7 @@ &wkup_r5fss0_core0 {
> mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> <&wkup_r5fss0_core0_memory_region>;
> + status = "okay";
Reviewed-by: Dhruva Gole <d-gole@...com>
--
Best regards,
Dhruva Gole
Texas Instruments Incorporated
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