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Message-ID: <20250910094136.4423-1-cp0613@linux.alibaba.com>
Date: Wed, 10 Sep 2025 17:41:36 +0800
From: cp0613@...ux.alibaba.com
To: rafael@...nel.org,
lenb@...nel.org,
guoren@...nel.org,
jeeheng.sia@...rfivetech.com
Cc: linux-acpi@...r.kernel.org,
linux-kernel@...r.kernel.org,
Chen Pei <cp0613@...ux.alibaba.com>
Subject: [PATCH] ACPI: SPCR: Add support for DBG2 RISC-V SBI port subtype
From: Chen Pei <cp0613@...ux.alibaba.com>
The commit 4aca2bef90bd1296 ("ACPICA: Headers: Add RISC-V SBI Subtype
to DBG2") has added the definition of ACPI_DBG2_RISCV_SBI_CON.
This patch continues to implement its function so that the parameters
of uart can be configured correctly. Subsequent calls to setup_earlycon
to reuse the earlycon based on sbi.
Signed-off-by: Chen Pei <cp0613@...ux.alibaba.com>
---
drivers/acpi/spcr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index cd36a97b0ea2..208d6bbc65e0 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -141,6 +141,9 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
case ACPI_DBG2_16550_NVIDIA:
uart = "uart";
break;
+ case ACPI_DBG2_RISCV_SBI_CON:
+ uart = "sbi";
+ break;
default:
err = -ENOENT;
goto done;
--
2.49.0
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